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Pull requests: diffblue/hw-cbmc
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SystemVerilog: Parsing and type checking for queue types
Verilog
#967
by kroening
was merged Feb 9, 2025
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SystemVerilog: concurrent assertion items go into module namespace
Verilog
#575
by kroening
was merged Jun 25, 2024
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SystemVerilog: discover package dependencies in expressions and types
Verilog
#968
by kroening
was merged Feb 8, 2025
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Verilog: add rounding mode to casts to real/shortreal
Verilog
#891
by kroening
was merged Dec 20, 2024
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Verilog: grammar for
unique case
and unique if
Verilog
#446
by kroening
was merged Apr 23, 2024
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Verilog: expand $ND during synthesis, not typechecking
Verilog
#436
by kroening
was merged Apr 16, 2024
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Verilog: separate ID for explicit typecast expressions
Verilog
#425
by kroening
was merged Apr 22, 2024
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Updated in the last three days: updated:>2025-02-21.