Verilog: add rounding mode to casts to real/shortreal #891
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kroening
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Should there also be a test that newly passes? As is right now, this adds both a KNOWNBUG test and code changes, the effect of the latter not being very clear as far as their impact on tests is concerned. |
kroening
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I've split up the test. |
Casts to real/shortreal may need to round, hence add the rounding mode during lowering.
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tautschnig
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Dec 20, 2024
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Casts to
real/shortrealmay need to round, hence add the rounding mode during lowering.