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SystemVerilog: type parameters #464

Merged
merged 1 commit into from
Apr 30, 2024
Merged

SystemVerilog: type parameters #464

merged 1 commit into from
Apr 30, 2024

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kroening
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@kroening kroening commented Apr 29, 2024

This adds support for localparam and parameter declarations that declare a type.

@kroening kroening marked this pull request as ready for review April 29, 2024 22:33
@tautschnig
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Requires a rebase to resolve conflicts.

@kroening
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Requires a rebase to resolve conflicts.

Done!


auto symbol_type =
to_be_elaborated_typet(type.is_nil() ? derive_from_value_typet() : type);
symbolt symbol{full_identifier, symbol_type, mode};
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Could use type_symbolt (and drop later the symbol.is_type = true;)

This adds support for localparam and parameter declarations that declare a
type.
@kroening kroening merged commit bf6629f into main Apr 30, 2024
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@kroening kroening deleted the type_parameters1 branch April 30, 2024 09:41
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2 participants