msprof simulator on custom A5 kernel + torch_npu wrapper launch#169
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msprof simulator on custom A5 kernel + torch_npu wrapper launch#169learning-chip wants to merge 1 commit into
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learning-chip
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May 18, 2026
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| # msprof CA simulator models pipeline timing only, not numeric results. | ||
| print("Input X (first 16):", x.flatten()[:16].cpu()) | ||
| print("Output Z (first 16):", z.flatten()[:16].cpu()) | ||
| print("vabs_fp16 kernel launch completed.") |
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Actually, accuracy test also passes in msprof simulator mode. Unlike cannsim (biprof) that only simulates cycles.
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May 18, 2026
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| exec msprof op simulator --soc-version=Ascend950PR_9599 \ | ||
| --output="msprof_res" --kernel-name="vabs_fp16_mix_aic" --launch-count=10 \ | ||
| python ./run_abs.py |
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Run once without --kernel-name= and a large --launch-count, then will see all full kernel names.
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This was referenced May 18, 2026
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Reproduced in Docker image learning-chip/agent_docker_npu#8
The profiler trace correctly shows
VABSinstruction for this custom abs kernel.