Skip to content

Actions: huawei-csl/pto-kernels

Actions

All workflows

Actions

Loading...
Loading

Showing runs from all workflows
2,500+ workflow runs
2,500+ workflow runs

Filter by Workflow

⌥ + click/return to exclude

Filter by Event

⌥ + click/return to exclude

Filter by Status

⌥ + click/return to exclude

Filter by Branch

⌥ + click/return to exclude

Filter by Actor

⌥ + click/return to exclude
Check Doxygen Docs Check Doxygen Docs #721: Scheduled
22s main
main
22s
CI CI #834: Scheduled
8m 0s main
main
8m 0s
CI CI #170: Scheduled
2m 9s main
main
2m 9s
Lint Lint #790: Scheduled
28s main
main
28s
Check Doxygen Docs Check Doxygen Docs #720: Scheduled
27s main
main
27s
CI CI #833: Scheduled
5m 4s main
main
5m 4s
CI CI #169: Scheduled
4m 11s main
main
4m 11s
Lint Lint #789: Scheduled
28s main
main
28s
Check Doxygen Docs Check Doxygen Docs #719: Scheduled
27s main
main
27s
CI CI #832: Scheduled
8m 32s main
main
8m 32s
CI CI #168: Scheduled
1m 59s main
main
1m 59s
Lint Lint #788: Scheduled
30s main
main
30s
Check Doxygen Docs Check Doxygen Docs #718: Scheduled
21s main
main
21s
CI CI #831: Scheduled
7m 0s main
main
7m 0s
CI CI #167: Scheduled
6m 1s main
main
6m 1s
Lint Lint #787: Scheduled
31s main
main
31s
Add Ascend950 pure-vector simulator examples for SiLU and SwiGLU. Check Doxygen Docs #717: Pull request #172 synchronize by learning-chip
44s sim_speed
sim_speed
44s
Add Ascend950 pure-vector simulator examples for SiLU and SwiGLU. CI #830: Pull request #172 synchronize by learning-chip
6m 19s sim_speed
sim_speed
6m 19s
Add Ascend950 pure-vector simulator examples for SiLU and SwiGLU. Lint #786: Pull request #172 synchronize by learning-chip
33s sim_speed
sim_speed
33s
Add Ascend950 pure-vector simulator examples for SiLU and SwiGLU. CI #166: Pull request #172 synchronize by learning-chip
3m 23s sim_speed
sim_speed
3m 23s
Code Quality: PR #172 CodeQL #395: by learning-chip
1m 7s refs/pull/172/head
refs/pull/172/head
1m 7s
Code Quality: Scheduled CodeQL #394: by github-advanced-security AI
1m 1s main
main
1m 1s
Add Ascend950 pure-vector simulator examples for SiLU and SwiGLU. Lint #785: Pull request #172 opened by learning-chip
30s sim_speed
sim_speed
30s
Add Ascend950 pure-vector simulator examples for SiLU and SwiGLU. CI #829: Pull request #172 opened by learning-chip
5m 49s sim_speed
sim_speed
5m 49s
Add Ascend950 pure-vector simulator examples for SiLU and SwiGLU. Check Doxygen Docs #716: Pull request #172 opened by learning-chip
29s sim_speed
sim_speed
29s