Verilog: allow task invocations without parentheses #3311
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2 warnings
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Post Prepare ccache
Input 'save-always' has been deprecated with message: save-always does not work as intended and will be removed in a future release.
A separate `actions/cache/restore` step should be used instead.
See https://github.com/actions/cache/tree/main/save#always-save-cache for more details.
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Prepare ccache
Input 'save-always' has been deprecated with message: save-always does not work as intended and will be removed in a future release.
A separate `actions/cache/restore` step should be used instead.
See https://github.com/actions/cache/tree/main/save#always-save-cache for more details.
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