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Verilog: add rounding mode to casts to real/shortreal #1819

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Verilog: add rounding mode to casts to real/shortreal

Verilog: add rounding mode to casts to real/shortreal #1819

Triggered via pull request December 20, 2024 16:48
@kroeningkroening
synchronize #891
floatbv-typecast
Status Success
Total duration 1m 21s
Artifacts –

syntax-checks.yaml

on: pull_request
check-clang-format
1m 12s
check-clang-format
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