Skip to content

Update read/written registers for x86 procedure return instructions #2789

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 1 commit into from
Oct 2, 2025
Merged

Update read/written registers for x86 procedure return instructions #2789

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
24 changes: 12 additions & 12 deletions arch/X86/X86MappingInsn.inc
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -7958,42 +7958,42 @@
{
X86_LRETIL, X86_INS_RETF, 0,
#ifndef CAPSTONE_DIET
{ 0 }, { X86_REG_SP, X86_REG_IP, X86_REG_CS, 0 }, { X86_GRP_RET, X86_GRP_NOT64BITMODE, 0 }, 0, 0
{ X86_REG_ESP, X86_REG_SS, 0 }, { X86_REG_ESP, X86_REG_EIP, X86_REG_CS, 0 }, { X86_GRP_RET, X86_GRP_NOT64BITMODE, 0 }, 0, 0
#endif
},

{
X86_LRETIQ, X86_INS_RETFQ, 0,
#ifndef CAPSTONE_DIET
{ 0 }, { X86_REG_RSP, X86_REG_RIP, X86_REG_CS, 0 }, { X86_GRP_RET, X86_GRP_MODE64, 0 }, 0, 0
{ X86_REG_RSP, X86_REG_SS, 0 }, { X86_REG_RSP, X86_REG_RIP, X86_REG_CS, 0 }, { X86_GRP_RET, X86_GRP_MODE64, 0 }, 0, 0
#endif
},

{
X86_LRETIW, X86_INS_RETF, 0,
#ifndef CAPSTONE_DIET
{ 0 }, { X86_REG_ESP, X86_REG_EIP, X86_REG_CS, 0 }, { X86_GRP_RET, X86_GRP_NOT64BITMODE, 0 }, 0, 0
{ X86_REG_SP, X86_REG_SS, 0 }, { X86_REG_SP, X86_REG_IP, X86_REG_CS, 0 }, { X86_GRP_RET, X86_GRP_NOT64BITMODE, 0 }, 0, 0
#endif
},

{
X86_LRETL, X86_INS_RETF, 0,
#ifndef CAPSTONE_DIET
{ 0 }, { X86_REG_SP, X86_REG_IP, X86_REG_CS, 0 }, { X86_GRP_RET, X86_GRP_NOT64BITMODE, 0 }, 0, 0
{ X86_REG_ESP, X86_REG_SS, 0 }, { X86_REG_ESP, X86_REG_EIP, X86_REG_CS, 0 }, { X86_GRP_RET, X86_GRP_NOT64BITMODE, 0 }, 0, 0
#endif
},

{
X86_LRETQ, X86_INS_RETFQ, 0,
#ifndef CAPSTONE_DIET
{ 0 }, { X86_REG_RSP, X86_REG_RIP, X86_REG_CS, 0 }, { X86_GRP_RET, X86_GRP_MODE64, 0 }, 0, 0
{ X86_REG_RSP, X86_REG_SS, 0 }, { X86_REG_RSP, X86_REG_RIP, X86_REG_CS, 0 }, { X86_GRP_RET, X86_GRP_MODE64, 0 }, 0, 0
#endif
},

{
X86_LRETW, X86_INS_RETF, 0,
#ifndef CAPSTONE_DIET
{ 0 }, { X86_REG_ESP, X86_REG_EIP, X86_REG_CS, 0 }, { X86_GRP_RET, X86_GRP_MODE64, 0 }, 0, 0
{ X86_REG_SP, X86_REG_SS, 0 }, { X86_REG_SP, X86_REG_IP, X86_REG_CS, 0 }, { X86_GRP_RET, X86_GRP_MODE64, 0 }, 0, 0
#endif
},

Expand Down Expand Up @@ -15378,42 +15378,42 @@
{
X86_RETIL, X86_INS_RET, 0,
#ifndef CAPSTONE_DIET
{ X86_REG_SP, 0 }, { X86_REG_SP, X86_REG_IP, 0 }, { X86_GRP_RET, X86_GRP_NOT64BITMODE, 0 }, 0, 0
{ X86_REG_ESP, X86_REG_SS, 0 }, { X86_REG_ESP, X86_REG_EIP, 0 }, { X86_GRP_RET, X86_GRP_NOT64BITMODE, 0 }, 0, 0
#endif
},

{
X86_RETIQ, X86_INS_RET, 0,
#ifndef CAPSTONE_DIET
{ X86_REG_RSP, 0 }, { X86_REG_RSP, X86_REG_RIP, 0 }, { X86_GRP_RET, X86_GRP_MODE64, 0 }, 0, 0
{ X86_REG_RSP, X86_REG_SS, 0 }, { X86_REG_RSP, X86_REG_RIP, 0 }, { X86_GRP_RET, X86_GRP_MODE64, 0 }, 0, 0
#endif
},

{
X86_RETIW, X86_INS_RET, 0,
#ifndef CAPSTONE_DIET
{ X86_REG_ESP, 0 }, { X86_REG_ESP, X86_REG_EIP, 0 }, { X86_GRP_RET, X86_GRP_NOT64BITMODE, 0 }, 0, 0
{ X86_REG_SP, X86_REG_SS, 0 }, { X86_REG_SP, X86_REG_IP, 0 }, { X86_GRP_RET, X86_GRP_NOT64BITMODE, 0 }, 0, 0
#endif
},

{
X86_RETL, X86_INS_RET, 0,
#ifndef CAPSTONE_DIET
{ X86_REG_SP, 0 }, { X86_REG_SP, X86_REG_IP, 0 }, { X86_GRP_RET, X86_GRP_NOT64BITMODE, 0 }, 0, 0
{ X86_REG_ESP, X86_REG_SS, 0 }, { X86_REG_ESP, X86_REG_EIP, 0 }, { X86_GRP_RET, X86_GRP_NOT64BITMODE, 0 }, 0, 0
#endif
},

{
X86_RETQ, X86_INS_RET, 0,
#ifndef CAPSTONE_DIET
{ X86_REG_RSP, 0 }, { X86_REG_RSP, X86_REG_RIP, 0 }, { X86_GRP_RET, X86_GRP_MODE64, 0 }, 0, 0
{ X86_REG_RSP, X86_REG_SS, 0 }, { X86_REG_RSP, X86_REG_RIP, 0 }, { X86_GRP_RET, X86_GRP_MODE64, 0 }, 0, 0
#endif
},

{
X86_RETW, X86_INS_RET, 0,
#ifndef CAPSTONE_DIET
{ X86_REG_ESP, 0 }, { X86_REG_ESP, X86_REG_EIP, 0 }, { X86_GRP_RET, X86_GRP_NOT64BITMODE, 0 }, 0, 0
{ X86_REG_SP, X86_REG_SS, 0 }, { X86_REG_SP, X86_REG_IP, 0 }, { X86_GRP_RET, X86_GRP_NOT64BITMODE, 0 }, 0, 0
#endif
},

Expand Down
24 changes: 12 additions & 12 deletions arch/X86/X86MappingInsn_reduce.inc
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -4493,42 +4493,42 @@
{
X86_LRETIL, X86_INS_RETF, 0,
#ifndef CAPSTONE_DIET
{ 0 }, { X86_REG_SP, X86_REG_IP, X86_REG_CS, 0 }, { X86_GRP_RET, X86_GRP_NOT64BITMODE, 0 }, 0, 0
{ X86_REG_ESP, X86_REG_SS, 0 }, { X86_REG_ESP, X86_REG_EIP, X86_REG_CS, 0 }, { X86_GRP_RET, X86_GRP_NOT64BITMODE, 0 }, 0, 0
#endif
},

{
X86_LRETIQ, X86_INS_RETFQ, 0,
#ifndef CAPSTONE_DIET
{ 0 }, { X86_REG_RSP, X86_REG_RIP, X86_REG_CS, 0 }, { X86_GRP_RET, X86_GRP_MODE64, 0 }, 0, 0
{ X86_REG_RSP, X86_REG_SS, 0 }, { X86_REG_RSP, X86_REG_RIP, X86_REG_CS, 0 }, { X86_GRP_RET, X86_GRP_MODE64, 0 }, 0, 0
#endif
},

{
X86_LRETIW, X86_INS_RETF, 0,
#ifndef CAPSTONE_DIET
{ 0 }, { X86_REG_ESP, X86_REG_EIP, X86_REG_CS, 0 }, { X86_GRP_RET, X86_GRP_NOT64BITMODE, 0 }, 0, 0
{ X86_REG_SP, X86_REG_SS, 0 }, { X86_REG_SP, X86_REG_IP, X86_REG_CS, 0 }, { X86_GRP_RET, X86_GRP_NOT64BITMODE, 0 }, 0, 0
#endif
},

{
X86_LRETL, X86_INS_RETF, 0,
#ifndef CAPSTONE_DIET
{ 0 }, { X86_REG_SP, X86_REG_IP, X86_REG_CS, 0 }, { X86_GRP_RET, X86_GRP_NOT64BITMODE, 0 }, 0, 0
{ X86_REG_ESP, X86_REG_SS, 0 }, { X86_REG_ESP, X86_REG_EIP, X86_REG_CS, 0 }, { X86_GRP_RET, X86_GRP_NOT64BITMODE, 0 }, 0, 0
#endif
},

{
X86_LRETQ, X86_INS_RETFQ, 0,
#ifndef CAPSTONE_DIET
{ 0 }, { X86_REG_RSP, X86_REG_RIP, X86_REG_CS, 0 }, { X86_GRP_RET, X86_GRP_MODE64, 0 }, 0, 0
{ X86_REG_RSP, X86_REG_SS, 0 }, { X86_REG_RSP, X86_REG_RIP, X86_REG_CS, 0 }, { X86_GRP_RET, X86_GRP_MODE64, 0 }, 0, 0
#endif
},

{
X86_LRETW, X86_INS_RETF, 0,
#ifndef CAPSTONE_DIET
{ 0 }, { X86_REG_ESP, X86_REG_EIP, X86_REG_CS, 0 }, { X86_GRP_RET, X86_GRP_MODE64, 0 }, 0, 0
{ X86_REG_SP, X86_REG_SS, 0 }, { X86_REG_SP, X86_REG_IP, X86_REG_CS, 0 }, { X86_GRP_RET, X86_GRP_MODE64, 0 }, 0, 0
#endif
},

Expand Down Expand Up @@ -7251,42 +7251,42 @@
{
X86_RETIL, X86_INS_RET, 0,
#ifndef CAPSTONE_DIET
{ X86_REG_SP, 0 }, { X86_REG_SP, X86_REG_IP, 0 }, { X86_GRP_RET, X86_GRP_NOT64BITMODE, 0 }, 0, 0
{ X86_REG_ESP, X86_REG_SS, 0 }, { X86_REG_ESP, X86_REG_EIP, 0 }, { X86_GRP_RET, X86_GRP_NOT64BITMODE, 0 }, 0, 0
#endif
},

{
X86_RETIQ, X86_INS_RET, 0,
#ifndef CAPSTONE_DIET
{ X86_REG_RSP, 0 }, { X86_REG_RSP, X86_REG_RIP, 0 }, { X86_GRP_RET, X86_GRP_MODE64, 0 }, 0, 0
{ X86_REG_RSP, X86_REG_SS, 0 }, { X86_REG_RSP, X86_REG_RIP, 0 }, { X86_GRP_RET, X86_GRP_MODE64, 0 }, 0, 0
#endif
},

{
X86_RETIW, X86_INS_RET, 0,
#ifndef CAPSTONE_DIET
{ X86_REG_ESP, 0 }, { X86_REG_ESP, X86_REG_EIP, 0 }, { X86_GRP_RET, X86_GRP_NOT64BITMODE, 0 }, 0, 0
{ X86_REG_SP, X86_REG_SS, 0 }, { X86_REG_SP, X86_REG_IP, 0 }, { X86_GRP_RET, X86_GRP_NOT64BITMODE, 0 }, 0, 0
#endif
},

{
X86_RETL, X86_INS_RET, 0,
#ifndef CAPSTONE_DIET
{ X86_REG_SP, 0 }, { X86_REG_SP, X86_REG_IP, 0 }, { X86_GRP_RET, X86_GRP_NOT64BITMODE, 0 }, 0, 0
{ X86_REG_ESP, X86_REG_SS, 0 }, { X86_REG_ESP, X86_REG_EIP, 0 }, { X86_GRP_RET, X86_GRP_NOT64BITMODE, 0 }, 0, 0
#endif
},

{
X86_RETQ, X86_INS_RET, 0,
#ifndef CAPSTONE_DIET
{ X86_REG_RSP, 0 }, { X86_REG_RSP, X86_REG_RIP, 0 }, { X86_GRP_RET, X86_GRP_MODE64, 0 }, 0, 0
{ X86_REG_RSP, X86_REG_SS, 0 }, { X86_REG_RSP, X86_REG_RIP, 0 }, { X86_GRP_RET, X86_GRP_MODE64, 0 }, 0, 0
#endif
},

{
X86_RETW, X86_INS_RET, 0,
#ifndef CAPSTONE_DIET
{ X86_REG_ESP, 0 }, { X86_REG_ESP, X86_REG_EIP, 0 }, { X86_GRP_RET, X86_GRP_NOT64BITMODE, 0 }, 0, 0
{ X86_REG_SP, X86_REG_SS, 0 }, { X86_REG_SP, X86_REG_IP, 0 }, { X86_GRP_RET, X86_GRP_NOT64BITMODE, 0 }, 0, 0
#endif
},

Expand Down
161 changes: 139 additions & 22 deletions tests/details/x86.yaml
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -1241,28 +1241,6 @@ test_cases:
size: 8
eflags: [ X86_EFLAGS_TEST_ZF ]
regs_read: [ rflags ]
-
input:
bytes: [ 0xc3 ]
arch: "x86"
options: [ CS_OPT_DETAIL, CS_MODE_64 ]
address: 0x0
expected:
insns:
-
asm_text: "ret"
details:
x86:
prefix: [ X86_PREFIX_0, X86_PREFIX_0, X86_PREFIX_0, X86_PREFIX_0 ]
opcode: [ 0xc3, 0x00, 0x00, 0x00 ]
rex: 0x0
addr_size: 8
modrm: 0x0
disp: 0x0
sib: 0x0
sib_scale: 0
regs_read: [ rsp ]
regs_write: [ rsp, rip ]
-
input:
bytes: [ 0x66, 0x45, 0x0f, 0x2f, 0x38 ]
Expand Down Expand Up @@ -3132,3 +3110,142 @@ test_cases:
opcode: [ 0xc9, 0x00, 0x00, 0x00 ]
regs_read: [ rbp, rsp ]
regs_write: [ rbp, rsp ]

-
input:
name: "Return from procedure, 16-bit decode mode"
bytes: [
0xc3, # ret (near)
0xcb, # retf (far)
0xc2, 0x34, 0x12, # ret 0x1234 (near)
0xca, 0x34, 0x12, # retf 0x1234 (far)
]
arch: "x86"
options: [ CS_OPT_DETAIL, CS_MODE_16 ]
address: 0x0
expected:
insns:
-
asm_text: "ret"
details:
x86:
prefix: [ X86_PREFIX_0, X86_PREFIX_0, X86_PREFIX_0, X86_PREFIX_0 ]
opcode: [ 0xc3, 0x00, 0x00, 0x00 ]
regs_read: [ sp, ss ]
regs_write: [ sp, ip ]
-
asm_text: "retf"
details:
x86:
prefix: [ X86_PREFIX_0, X86_PREFIX_0, X86_PREFIX_0, X86_PREFIX_0 ]
opcode: [ 0xcb, 0x00, 0x00, 0x00 ]
regs_read: [ sp, ss ]
regs_write: [ sp, ip, cs ]
-
asm_text: "ret 0x1234"
details:
x86:
prefix: [ X86_PREFIX_0, X86_PREFIX_0, X86_PREFIX_0, X86_PREFIX_0 ]
opcode: [ 0xc2, 0x00, 0x00, 0x00 ]
regs_read: [ sp, ss ]
regs_write: [ sp, ip ]
-
asm_text: "retf 0x1234"
details:
x86:
prefix: [ X86_PREFIX_0, X86_PREFIX_0, X86_PREFIX_0, X86_PREFIX_0 ]
opcode: [ 0xca, 0x00, 0x00, 0x00 ]
regs_read: [ sp, ss ]
regs_write: [ sp, ip, cs ]
-
input:
name: "Return from procedure, 32-bit decode mode"
bytes: [
0xc3, # ret (near)
0xcb, # retf (far)
0xc2, 0x34, 0x12, # ret 0x1234 (near)
0xca, 0x34, 0x12, # retf 0x1234 (far)
]
arch: "x86"
options: [ CS_OPT_DETAIL, CS_MODE_32 ]
address: 0x0
expected:
insns:
-
asm_text: "ret"
details:
x86:
prefix: [ X86_PREFIX_0, X86_PREFIX_0, X86_PREFIX_0, X86_PREFIX_0 ]
opcode: [ 0xc3, 0x00, 0x00, 0x00 ]
regs_read: [ esp, ss ]
regs_write: [ esp, eip ]
-
asm_text: "retf"
details:
x86:
prefix: [ X86_PREFIX_0, X86_PREFIX_0, X86_PREFIX_0, X86_PREFIX_0 ]
opcode: [ 0xcb, 0x00, 0x00, 0x00 ]
regs_read: [ esp, ss ]
regs_write: [ esp, eip, cs ]
-
asm_text: "ret 0x1234"
details:
x86:
prefix: [ X86_PREFIX_0, X86_PREFIX_0, X86_PREFIX_0, X86_PREFIX_0 ]
opcode: [ 0xc2, 0x00, 0x00, 0x00 ]
regs_read: [ esp, ss ]
regs_write: [ esp, eip ]
-
asm_text: "retf 0x1234"
details:
x86:
prefix: [ X86_PREFIX_0, X86_PREFIX_0, X86_PREFIX_0, X86_PREFIX_0 ]
opcode: [ 0xca, 0x00, 0x00, 0x00 ]
regs_read: [ esp, ss ]
regs_write: [ esp, eip, cs ]
-
input:
name: "Return from procedure, 64-bit decode mode"
bytes: [
0xc3, # ret (near)
0xcb, # retf (far)
0xc2, 0x34, 0x12, # ret 0x1234 (near)
0xca, 0x34, 0x12, # retf 0x1234 (far)
]
arch: "x86"
options: [ CS_OPT_DETAIL, CS_MODE_64 ]
address: 0x0
expected:
insns:
-
asm_text: "ret"
details:
x86:
prefix: [ X86_PREFIX_0, X86_PREFIX_0, X86_PREFIX_0, X86_PREFIX_0 ]
opcode: [ 0xc3, 0x00, 0x00, 0x00 ]
regs_read: [ rsp, ss ]
regs_write: [ rsp, rip ]
-
asm_text: "retf"
details:
x86:
prefix: [ X86_PREFIX_0, X86_PREFIX_0, X86_PREFIX_0, X86_PREFIX_0 ]
opcode: [ 0xcb, 0x00, 0x00, 0x00 ]
regs_read: [ esp, ss ]
regs_write: [ esp, eip, cs ] # BUG: decoded as X86_LRETL instead of X86_LRETQ
-
asm_text: "ret 0x1234"
details:
x86:
prefix: [ X86_PREFIX_0, X86_PREFIX_0, X86_PREFIX_0, X86_PREFIX_0 ]
opcode: [ 0xc2, 0x00, 0x00, 0x00 ]
regs_read: [ rsp, ss ]
regs_write: [ rsp, rip ]
-
asm_text: "retf 0x1234"
details:
x86:
prefix: [ X86_PREFIX_0, X86_PREFIX_0, X86_PREFIX_0, X86_PREFIX_0 ]
opcode: [ 0xca, 0x00, 0x00, 0x00 ]
regs_read: [ esp, ss ]
regs_write: [ esp, eip, cs ] # BUG: decoded as X86_LRETIL instead of X86_LRETIQ
Loading