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imx6ull: configuration changes to multiple drivers #611

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eacbdbf
libimx6ull-i2c: add mux configuration options
jmaksymowicz Nov 27, 2025
0942f5f
imx6ull-uart: add mux configuration options
jmaksymowicz Nov 27, 2025
2f1a078
imx6ull-ecspi: apply clang-format
jmaksymowicz Dec 5, 2025
7e36d63
imx6ull-ecspi: add mux configuration options
jmaksymowicz Dec 5, 2025
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98 changes: 98 additions & 0 deletions i2c/imx6ull/imx6ull-i2c-def.h
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Original file line number Diff line number Diff line change
@@ -0,0 +1,98 @@
/*
* Phoenix-RTOS
*
* Operating system kernel
*
* i.MX6ULL I2C driver
*
* Default pin definitions
*
* Copyright 2025 Phoenix Systems
* Author: Jacek Maksymowicz
*
* This file is part of Phoenix-RTOS.
*
* %LICENSE%
*/

#ifndef _IMX6ULL_I2C_DEF_H_
#define _IMX6ULL_I2C_DEF_H_

#ifndef CONFIG_I2C1_SCL_MUX_PAD
#define CONFIG_I2C1_SCL_MUX_PAD mux_gpio1_02
#endif
#ifndef CONFIG_I2C1_SCL_MUX_VAL
#define CONFIG_I2C1_SCL_MUX_VAL 0
#endif
#ifndef CONFIG_I2C1_SDA_MUX_PAD
#define CONFIG_I2C1_SDA_MUX_PAD mux_gpio1_03
#endif
#ifndef CONFIG_I2C1_SDA_MUX_VAL
#define CONFIG_I2C1_SDA_MUX_VAL 0
#endif

#ifndef CONFIG_I2C2_SCL_MUX_PAD
#define CONFIG_I2C2_SCL_MUX_PAD mux_gpio1_00
#endif
#ifndef CONFIG_I2C2_SCL_MUX_VAL
#define CONFIG_I2C2_SCL_MUX_VAL 0
#endif
#ifndef CONFIG_I2C2_SDA_MUX_PAD
#define CONFIG_I2C2_SDA_MUX_PAD mux_gpio1_01
#endif
#ifndef CONFIG_I2C2_SDA_MUX_VAL
#define CONFIG_I2C2_SDA_MUX_VAL 0
#endif

#ifndef CONFIG_I2C3_SCL_MUX_PAD
#define CONFIG_I2C3_SCL_MUX_PAD mux_lcd_d1
#endif
#ifndef CONFIG_I2C3_SCL_MUX_VAL
#define CONFIG_I2C3_SCL_MUX_VAL 4
#endif
#ifndef CONFIG_I2C3_SDA_MUX_PAD
#define CONFIG_I2C3_SDA_MUX_PAD mux_lcd_d0
#endif
#ifndef CONFIG_I2C3_SDA_MUX_VAL
#define CONFIG_I2C3_SDA_MUX_VAL 4
#endif

#ifndef CONFIG_I2C4_SCL_MUX_PAD
#define CONFIG_I2C4_SCL_MUX_PAD mux_lcd_d3
#endif
#ifndef CONFIG_I2C4_SCL_MUX_VAL
#define CONFIG_I2C4_SCL_MUX_VAL 4
#endif
#ifndef CONFIG_I2C4_SDA_MUX_PAD
#define CONFIG_I2C4_SDA_MUX_PAD mux_lcd_d2
#endif
#ifndef CONFIG_I2C4_SDA_MUX_VAL
#define CONFIG_I2C4_SDA_MUX_VAL 4
#endif

#ifndef CONFIG_I2C1_SCL_ISEL
#define CONFIG_I2C1_SCL_ISEL 0
#endif
#ifndef CONFIG_I2C1_SDA_ISEL
#define CONFIG_I2C1_SDA_ISEL 1
#endif
#ifndef CONFIG_I2C2_SCL_ISEL
#define CONFIG_I2C2_SCL_ISEL 1
#endif
#ifndef CONFIG_I2C2_SDA_ISEL
#define CONFIG_I2C2_SDA_ISEL 1
#endif
#ifndef CONFIG_I2C3_SCL_ISEL
#define CONFIG_I2C3_SCL_ISEL 2
#endif
#ifndef CONFIG_I2C3_SDA_ISEL
#define CONFIG_I2C3_SDA_ISEL 2
#endif
#ifndef CONFIG_I2C4_SCL_ISEL
#define CONFIG_I2C4_SCL_ISEL 2
#endif
#ifndef CONFIG_I2C4_SDA_ISEL
#define CONFIG_I2C4_SDA_ISEL 2
#endif

#endif /* _IMX6ULL_I2C_DEF_H_ */
22 changes: 14 additions & 8 deletions i2c/imx6ull/libimx6ull-i2c.c
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Original file line number Diff line number Diff line change
Expand Up @@ -24,6 +24,12 @@

#include <phoenix/arch/armv7a/imx6ull/imx6ull.h>

#include <board_config.h>
#include "imx6ull-i2c-def.h"

#define XCAT2(a, b) a##b
#define PCTL(x) XCAT2(pctl_, x)
Comment on lines +30 to +31
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@gemini-code-assist gemini-code-assist bot Dec 17, 2025

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medium

These helper macros (XCAT2, PCTL) are also defined in libecspi.c and imx6ull-uart.c. To avoid code duplication and improve maintainability, consider moving them to a common header file, for example a new platform utilities header or an existing one like <phoenix/arch/armv7a/imx6ull/imx6ull.h>.



/* clang-format off */
/* NOTE: i2c registers are 16-bit and every second offset is reserved for future use */
Expand All @@ -41,17 +47,17 @@ typedef struct {
} i2c_pctl_t;

static const i2c_pctl_t i2c_pctl_mux[4][2] = {
{ { pctl_mux_gpio1_02, 0 }, { pctl_mux_gpio1_03, 0 } },
{ { pctl_mux_gpio1_00, 0 }, { pctl_mux_gpio1_01, 0 } },
{ { pctl_mux_lcd_d1, 4 }, { pctl_mux_lcd_d0, 4 } },
{ { pctl_mux_lcd_d3, 4 }, { pctl_mux_lcd_d2, 4 } },
{ { PCTL(CONFIG_I2C1_SCL_MUX_PAD), CONFIG_I2C1_SCL_MUX_VAL }, { PCTL(CONFIG_I2C1_SDA_MUX_PAD), CONFIG_I2C1_SDA_MUX_VAL } },
{ { PCTL(CONFIG_I2C2_SCL_MUX_PAD), CONFIG_I2C2_SCL_MUX_VAL }, { PCTL(CONFIG_I2C2_SDA_MUX_PAD), CONFIG_I2C2_SDA_MUX_VAL } },
{ { PCTL(CONFIG_I2C3_SCL_MUX_PAD), CONFIG_I2C3_SCL_MUX_VAL }, { PCTL(CONFIG_I2C3_SDA_MUX_PAD), CONFIG_I2C3_SDA_MUX_VAL } },
{ { PCTL(CONFIG_I2C4_SCL_MUX_PAD), CONFIG_I2C4_SCL_MUX_VAL }, { PCTL(CONFIG_I2C4_SDA_MUX_PAD), CONFIG_I2C4_SDA_MUX_VAL } },
};

static const i2c_pctl_t i2c_pctl_isel[4][2] = {
{ { pctl_isel_i2c1_scl, 0 }, { pctl_isel_i2c1_sda, 1 } },
{ { pctl_isel_i2c2_scl, 1 }, { pctl_isel_i2c2_sda, 1 } },
{ { pctl_isel_i2c3_scl, 2 }, { pctl_isel_i2c3_sda, 2 } },
{ { pctl_isel_i2c4_scl, 2 }, { pctl_isel_i2c4_sda, 2 } },
{ { pctl_isel_i2c1_scl, CONFIG_I2C1_SCL_ISEL }, { pctl_isel_i2c1_sda, CONFIG_I2C1_SDA_ISEL } },
{ { pctl_isel_i2c2_scl, CONFIG_I2C2_SCL_ISEL }, { pctl_isel_i2c2_sda, CONFIG_I2C2_SDA_ISEL } },
{ { pctl_isel_i2c3_scl, CONFIG_I2C3_SCL_ISEL }, { pctl_isel_i2c3_sda, CONFIG_I2C3_SDA_ISEL } },
{ { pctl_isel_i2c4_scl, CONFIG_I2C4_SCL_ISEL }, { pctl_isel_i2c4_sda, CONFIG_I2C4_SDA_ISEL } },
};


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