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    48 repositories

    • ttsky-openfpga22

      Public template
      Submission template for Tiny Tapeout SKY130 (ChipFoundry) shuttles - Verilog HDL Projects
      Verilog
      •
      Apache License 2.0
      •148•0•0•0•Updated Sep 10, 2025Sep 10, 2025

    • tt08-simon

      Public template
      Simon Bitserial Cipher for TT08
      Verilog
      •
      Apache License 2.0
      •79•0•0•0•Updated Sep 3, 2025Sep 3, 2025

    • ttsky-regfield

      Public template
      Submission template for Tiny Tapeout SKY130 (ChipFoundry) shuttles - Verilog HDL Projects
      Verilog
      •
      Apache License 2.0
      •148•0•0•0•Updated Sep 3, 2025Sep 3, 2025

    • ttsky-delaychain

      Public template
      Submission template for Tiny Tapeout SKY130 (ChipFoundry) shuttles - Verilog HDL Projects
      Verilog
      •
      Apache License 2.0
      •148•0•0•0•Updated Sep 2, 2025Sep 2, 2025

    • tt09-microtile-final_TDC

      Public
      Verilog
      •
      Apache License 2.0
      •3•0•0•0•Updated Aug 20, 2025Aug 20, 2025

    • croc-keccak

      Public
      A PULP SoC for education, easy to understand and extend with a full flow for a physical design.
      SystemVerilog
      •
      Other
      •86•0•0•0•Updated Jun 18, 2025Jun 18, 2025

    • woot2025-GlitchGluck

      Public
      Verilog
      •
      Apache License 2.0
      •0•0•0•0•Updated Jun 16, 2025Jun 16, 2025

    • croc-mmreg

      Public
      CROC with a memory-mapped register
      SystemVerilog
      •
      Other
      •86•0•0•0•Updated Jun 16, 2025Jun 16, 2025

    • keccak_ref_verilog

      Public
      VHDL
      •
      Apache License 2.0
      •0•0•0•0•Updated Jun 16, 2025Jun 16, 2025

    • proact-asic-opt

      Public
      Verilog
      •0•0•0•0•Updated May 29, 2025May 29, 2025

    • microscan

      Public
      Jupyter Notebook
      •0•0•0•0•Updated May 12, 2025May 12, 2025

    • tt09-microtile-RO-tile2

      Public
      Experimental micro tiles container for Tiny Tapeout (second group)
      Verilog
      •
      Apache License 2.0
      •9•0•0•0•Updated Nov 9, 2024Nov 9, 2024

    • tt09-microtile-RO-tile1

      Public
      Experimental micro tiles container for Tiny Tapeout (second group)
      Verilog
      •
      Apache License 2.0
      •9•0•0•0•Updated Nov 9, 2024Nov 9, 2024

    • tt09-microtile-tdc-example

      Public
      Experimental micro tiles container for Tiny Tapeout (second group)
      Verilog
      •
      Apache License 2.0
      •9•0•0•0•Updated Nov 7, 2024Nov 7, 2024

    • tt09-microtile-sensor-example

      Public
      Experimental micro tiles container for Tiny Tapeout (second group)
      Verilog
      •
      Apache License 2.0
      •9•0•0•0•Updated Nov 6, 2024Nov 6, 2024

    • tt09-led-serial

      Public
      Tiny Tapeout 9 - Verilog HDL Projects
      Verilog
      •
      Apache License 2.0
      •118•0•0•0•Updated Oct 31, 2024Oct 31, 2024

    • tt09-microtile-final

      Public
      Verilog
      •
      Apache License 2.0
      •3•0•0•0•Updated Oct 30, 2024Oct 30, 2024

    • tt09-microtile-top

      Public
      Verilog
      •
      Apache License 2.0
      •3•0•0•0•Updated Oct 30, 2024Oct 30, 2024

    • tt08-microtile

      Public
      Tiny Tapeout 9 - Verilog HDL Projects
      Verilog
      •
      Apache License 2.0
      •118•0•0•0•Updated Oct 30, 2024Oct 30, 2024

    • tt09-verilog-example

      Public
      Tiny Tapeout 9 - Verilog HDL Projects
      Verilog
      •
      Apache License 2.0
      •118•0•0•0•Updated Oct 29, 2024Oct 29, 2024

    • ttihp-simon

      Public template
      Simon Bitserial Cipher for TTIHP
      Verilog
      •
      Apache License 2.0
      •79•0•0•0•Updated Oct 29, 2024Oct 29, 2024

    • tt09-verilog-ro_tile2

      Public
      Tiny Tapeout 9 - Verilog HDL Projects
      Verilog
      •
      Apache License 2.0
      •118•0•0•0•Updated Oct 28, 2024Oct 28, 2024

    • tt09-microtile-tdc

      Public template
      Submission template for Tiny Tapeout 9 - Verilog HDL Projects
      Verilog
      •
      Apache License 2.0
      •118•0•0•0•Updated Oct 18, 2024Oct 18, 2024

    • tt08-micro-tiles-example

      Public
      Experimental micro tiles container for Tiny Tapeout (second group)
      Verilog
      •
      Apache License 2.0
      •9•0•0•0•Updated Oct 12, 2024Oct 12, 2024

    • openlane2-led-serial

      Public
      Verilog
      •0•0•0•0•Updated Oct 8, 2024Oct 8, 2024

    • tt08-trng

      Public
      TRNG
      Verilog
      •
      Apache License 2.0
      •79•0•0•0•Updated Aug 31, 2024Aug 31, 2024

    • vodice24-asic-opt

      Public
      Verilog
      •1•4•0•0•Updated Aug 13, 2024Aug 13, 2024

    • ru-asic-opt

      Public
      Verilog
      •1•0•0•1•Updated May 17, 2024May 17, 2024

    • benchmark-SLx-IC

      Public
      Artifact for "Benchmarking and configuring security levels in intermittent computing"
      C
      •
      Other
      •1•0•0•0•Updated May 31, 2023May 31, 2023

    • rootcanal-ches2022

      Public
      GAP
      •
      Other
      •1•3•0•0•Updated Oct 31, 2022Oct 31, 2022