Add Ascend950 pure-vector simulator examples for SiLU and SwiGLU.#172
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learning-chip wants to merge 3 commits into
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Add Ascend950 pure-vector simulator examples for SiLU and SwiGLU.#172learning-chip wants to merge 3 commits into
learning-chip wants to merge 3 commits into
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Introduce a self-contained a5_sim harness with dav-c310-vec kernels, msprof and cannsim runners, scale-ladder timing docs, and OMP thread sweep scripts. Co-authored-by: Cursor <cursoragent@cursor.com>
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| if args.num_elements is None: | ||
| args.num_elements = 128 | ||
| shape = {"num_elements": args.num_elements} | ||
| t = args.num_elements |
| if args.input_n is None: | ||
| args.input_n = 256 | ||
| shape = {"batch": args.batch, "input_n": args.input_n} | ||
| t = args.batch * (args.input_n // 2) |
added 2 commits
May 27, 2026 18:24
Pin pto-isa at v9.0.0 to match CANN 9.0.0 and teach the a5_sim build helper to resolve headers from the in-repo third_party path first.
Reproduce SiLU/SwiGLU msprof and cannsim sweeps on x86_64 (AMD EPYC 9654). Document both hosts side by side: Kunpeng-920 baseline tables unchanged, new EPYC numbers (~3–5× faster wall time). Correctness PASS on smoke shapes for both tools.
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Compares msprof vs cannsim simulator speed, w.r.t. to input data size.
Take away: as long as the input data size is within ~4K seqlen, the simulator can finish in one minute, still tolerable for interactive kernel development without a real device.
Results copied from README.md
Kunpeng-920
SiLU msprof vs cannsim (seconds, wall clock):
SwiGLU msprof vs cannsim:
AMD EPYC 9654
SiLU msprof vs cannsim (seconds, wall clock):
SwiGLU msprof vs cannsim:
On both hosts, cannsim is generally faster on wall clock for these pure-vector kernels once T≥512; msprof carries heavier profiling/injection overhead.