Bluespexamples

Bluespec is High Level Hardware Description language (official feature list) used in academia and industry. The following are a collection of Bluespec Examples (Bluespexamples).

Dependencies: bsc and iverilog.

Basic examples:

Design	Description
Adder	Half Adder Full Adder using two half adders and OR Adder Tree
Multiplier	Two Input Multiplier Multiply and Accumulate(MAC) 1x1 Multiply and Accumulate(MAC) 2x2 using four MAC_1x1
Counter	Counter
Shifter	Shifter
Sorter	Two input Compare and Exchange(CAE) 4 input Bitonic Merge Unit using six CAE blocks

Advanced Examples using bsc-contrib:

TODO

Contributing

Contributions are welcome! Please fork the repository and submit a pull request with your changes.

Directory Structure

├── Makefile		    (Make html docs and view)
├── NOTES.adoc 	        (BSV notes)
├── README.adoc		    (This doc)
├── build		        (Build folder for all bsv projects)
│   ├── Makefile	    (Make verilog files and simulate)
│   ├── makefile.inc	(Insert file names and path)
│   └── verilog_dir/ 	(Verilog files compiled from src)
├── src/
│   ├── Common/		    (Common files)
|   ├── <Designs>       (Refer Index)
│   └── workspace/	    (Scratch worspace)
└── waveforms/          (Contains all the simulation waveform screenshots)

Resources:

Courses

• 6.375 - Complex Digital Systems

• 6.175 - Constructive Computer Architecture (Fall 2017)

• 6.S078 - Computer Architecture: A Constructive Approach

Readings

• BSV by example

• BSV Reference Guide

• BSV User Guide

• Computer Architecture: A Constructive Approach

Lecture Series:

• Youtube: MIT 6.004 Computation Structures Fall 2018 - All Lectures