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1. RISC_V_Single_Cycle_Processor RISC_V_Single_Cycle_Processor Public

   My implementation of the RISC-V Single Cycle Processor, based on the Textbook - Digital Design and Computer Architecture: RISC-V Edition by Sarah Harris and David Harris

   Verilog 30 5

2. Low_Power_Multidimensional_Sorters Low_Power_Multidimensional_Sorters Public

   Low Power Multidimensional Sorters using Clock Gating and Index Sorting

   Verilog 3 1

3. Bluespexamples Bluespexamples Public

   Bluespec Examples (Bluespexamples)

   PostScript 2 1

4. SPEC_CPU_2017 SPEC_CPU_2017 Public

   The SPEC CPU 2017 results for rate and speed, with instructions and custom interfacing methodology with Valgrind

   Shell 2 3

5. DSD_AHP DSD_AHP Public

   A compilation of Cadence tool commands and AHP Projects(Specifications and Solutions) I provided as the Teaching Assistant for the Digital Systems Design course (UE20EC313) at PES University, Banga…

   Verilog 3

6. CIE-PESU/DE10_FPGA CIE-PESU/DE10_FPGA Public

   Verilog 1 1