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@mcoshiro mcoshiro commented Nov 3, 2025

Fixes some bugs in sp2_mem_writer.vhd that caused discrepancies between EMP and standalone simulation/emulation, specifically

  • write addresses made to be only page, as expected by memory modules
  • delay between start, BX, and data signals slightly adjusted

Also added logic to propagate EMP reset to SectorProcessor

Remaining simulation discrepancies seem to just result from extra truncation caused by EMP input (this will be changed when links go to 360 MHz anyway).

These changes were added on top of PR #375.

lnestor and others added 4 commits October 19, 2025 20:40
This fixes a bug that occurred on the 2nd event if a tf_mem_bin
module is written to the same clock cycle sync_nent goes high. If
this happened, the binmask wouldn't be completely cleared for the
next BX, and TrackletProcessors would then read stale data.

There exists a guard against this for normal BX transitions, however
this guard wasn't used during the very first BX transition (when
sync_nent goes high).
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Thanks, @mcoshiro and @lnestor. Looks good. Approved!

@aehart aehart merged commit eb97428 into master Nov 18, 2025
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@aehart aehart deleted the fix_sp2memwriter branch November 18, 2025 15:08
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4 participants