Moved unproven feature gates to trait impl blocks

hal/src/thumbv6m/adc.rs

@@ -140,6 +140,7 @@ impl Adc<ADC> {
     }
 }
 
+#[cfg(feature = "unproven")]
 impl<WORD, PIN> OneShot<ADC, WORD, PIN> for Adc<ADC>
 where
     WORD: From<u16>,
@@ -179,6 +180,7 @@ macro_rules! adc_pins {
 
 /// Implement [`Channel`] for [`v1::Pin`]s based on the implementations for
 /// `v2` [`Pin`]s
+#[cfg(feature = "unproven")]
 impl<I> Channel<ADC> for v1::Pin<I, v1::PfB>
 where
     I: PinId,

hal/src/thumbv6m/mod.rs

@@ -10,13 +10,10 @@ pub mod calibration;
 pub mod clock;
 pub mod timer;
 
-#[cfg(feature = "unproven")]
 pub mod adc;
 
-#[cfg(feature = "unproven")]
 pub mod pwm;
 
-#[cfg(feature = "unproven")]
 pub mod watchdog;
 
 #[cfg(feature = "usb")]

hal/src/thumbv6m/pwm.rs

@@ -97,6 +97,7 @@ impl $TYPE {
     }
 }
 
+#[cfg(feature = "unproven")]
 impl PwmPin for $TYPE {
     type Duty = u16;
 
@@ -213,6 +214,7 @@ impl $TYPE {
     }
 }
 
+#[cfg(feature = "unproven")]
 impl Pwm for $TYPE {
     type Channel = Channel;
     type Time = Hertz;

hal/src/thumbv6m/watchdog.rs

@@ -30,6 +30,7 @@ impl Watchdog {
     }
 }
 
+#[cfg(feature = "unproven")]
 impl watchdog::Watchdog for Watchdog {
     /// Feeds an existing watchdog to ensure the processor isn't reset.
     /// Sometimes commonly referred to as "kicking" or "refreshing".
@@ -39,6 +40,7 @@ impl watchdog::Watchdog for Watchdog {
 }
 
 /// Disables a running watchdog timer so the processor won't be reset.
+#[cfg(feature = "unproven")]
 impl watchdog::WatchdogDisable for Watchdog {
     fn disable(&mut self) {
         // Disable the watchdog timer.
@@ -48,6 +50,7 @@ impl watchdog::WatchdogDisable for Watchdog {
     }
 }
 
+#[cfg(feature = "unproven")]
 impl watchdog::WatchdogEnable for Watchdog {
     type Time = u8;
 

hal/src/thumbv7em/adc.rs

@@ -247,6 +247,7 @@ impl<C> From<Adc<$ADC>> for InterruptAdc<$ADC, C>
     }
 }
 
+#[cfg(feature = "unproven")]
 impl<WORD, PIN> OneShot<$ADC, WORD, PIN> for Adc<$ADC>
 where
    WORD: From<u16>,
@@ -288,6 +289,7 @@ macro_rules! adc_pins {
 
 /// Implement [`Channel`] for [`v1::Pin`]s based on the implementations for
 /// `v2` [`Pin`]s
+#[cfg(feature = "unproven")]
 impl<I, A> Channel<A> for v1::Pin<I, v1::PfB>
 where
     I: PinId,

hal/src/thumbv7em/mod.rs

@@ -15,11 +15,6 @@ pub use reset_cause::*;
 mod serial_number;
 pub use serial_number::*;
 
-#[cfg(feature = "unproven")]
 pub mod adc;
-
-#[cfg(feature = "unproven")]
 pub mod pwm;
-
-#[cfg(feature = "unproven")]
 pub mod watchdog;

hal/src/thumbv7em/pwm.rs

@@ -166,6 +166,7 @@ impl<I: PinId> $TYPE<I> {
     }
 }
 
+#[cfg(feature = "unproven")]
 impl<I: PinId> PwmPin for $TYPE<I> {
     type Duty = u16;
 
@@ -486,6 +487,7 @@ impl<I: PinId, M: PinMode> $TYPE<I, M> {
     }
 }
 
+#[cfg(feature = "unproven")]
 impl<I: PinId, M: PinMode> Pwm for $TYPE<I, M> {
     type Channel = Channel;
     type Time = Hertz;

hal/src/thumbv7em/watchdog.rs

@@ -30,24 +30,60 @@ impl Watchdog {
     }
 }
 
+fn feed(&mut wdt: WDT) {
+    wdt.clear.write(|w| unsafe { w.clear().bits(0xA5) });
+}
+fn disable(&mut wdt: WDT) {
+    // Disable the watchdog timer.
+    wdt.ctrla.write(|w| w.enable().clear_bit());
+    // Wait for watchdog timer to be disabled.
+    while wdt.syncbusy.read().enable().bit_is_set() {}
+}
+fn start<T: Into<u8>>(&mut wdt: WDT, period: T) {
+    // Write the timeout configuration.
+    wdt.config.write(|w| unsafe { w.per().bits(period.into()) });
+    // Enable the watchdog timer.
+    wdt.ctrla.write(|w| w.enable().set_bit());
+    // Wait for watchdog timer to be enabled.
+    while wdt.syncbusy.read().enable().bit_is_set() {}
+}
+
+#[cfg(not(feature = "unproven"))]
+impl Watchdog {
+    /// Feeds an existing watchdog to ensure the processor isn't reset.
+    /// Sometimes commonly referred to as "kicking" or "refreshing".
+    fn feed(&mut self) {
+        feed(&mut self.wdt);
+    }
+    /// Disables a running watchdog timer so the processor won't be reset.
+    fn disable(&mut self) {
+        disable(&mut self.wdt);
+    }
+    /// Enables a watchdog timer to reset the processor if software is frozen
+    /// or stalled.
+    fn start<T: Into<u8>>(&mut self, period: T) {
+        start(&mut self.wdt, period);
+    }
+}
+
+#[cfg(feature = "unproven")]
 impl watchdog::Watchdog for Watchdog {
     /// Feeds an existing watchdog to ensure the processor isn't reset.
     /// Sometimes commonly referred to as "kicking" or "refreshing".
     fn feed(&mut self) {
-        self.wdt.clear.write(|w| unsafe { w.clear().bits(0xA5) });
+        feed(&mut self.wdt);
     }
 }
 
-/// Disables a running watchdog timer so the processor won't be reset.
+#[cfg(feature = "unproven")]
 impl watchdog::WatchdogDisable for Watchdog {
+    /// Disables a running watchdog timer so the processor won't be reset.
     fn disable(&mut self) {
-        // Disable the watchdog timer.
-        self.wdt.ctrla.write(|w| w.enable().clear_bit());
-        // Wait for watchdog timer to be disabled.
-        while self.wdt.syncbusy.read().enable().bit_is_set() {}
+        disable(&mut self.wdt);
     }
 }
 
+#[cfg(feature = "unproven")]
 impl watchdog::WatchdogEnable for Watchdog {
     type Time = u8;
 
@@ -57,13 +93,6 @@ impl watchdog::WatchdogEnable for Watchdog {
     where
         T: Into<Self::Time>,
     {
-        // Write the timeout configuration.
-        self.wdt
-            .config
-            .write(|w| unsafe { w.per().bits(period.into()) });
-        // Enable the watchdog timer.
-        self.wdt.ctrla.write(|w| w.enable().set_bit());
-        // Wait for watchdog timer to be enabled.
-        while self.wdt.syncbusy.read().enable().bit_is_set() {}
+        start(&mut self.wdt, period);
     }
 }