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@macpijan
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@wiktormowinski Please follow: https://docs.dasharo.com/dev-proc/source-code-structure/#commit-quality when contributing to coreboot/edk2 repositories.


register "tcc_offset" = "20" # TCC of 80C

register "usb2_wake_enable_bitmap" = "0x0002"
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Should it be in the enable ME commit?

@wiktormowinski wiktormowinski force-pushed the vp66xx-parity branch 2 times, most recently from cf7b40c to caaa6f4 Compare December 9, 2025 17:33
Upstream-Status: Inappropriate [Dasharo downstream]
Signed-off-by: Wiktor Mowinski <[email protected]>
Upstream-Status: Inappropriate [Dasharo downstream]
Signed-off-by: Wiktor Mowinski <[email protected]>
@wiktormowinski wiktormowinski force-pushed the vp66xx-parity branch 3 times, most recently from fc88f77 to 1f0d07c Compare December 10, 2025 09:40
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wiktormowinski commented Dec 10, 2025

@mkopec i need your help. This approach is being constantly marked as syntax error by runner.
1f0d07c
is this even a correct way to enable wol?

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mkopec commented Dec 10, 2025

@wiktormowinski doesn't look correct. Try doing what this patch does: https://review.coreboot.org/c/coreboot/+/89783

device ref pcie_rp8 on
register "pch_pcie_rp[PCH_RP(8)]" = "{
.flags = PCIE_RP_LTR | PCIE_RP_AER | PCIE_RP_CLK_REQ_UNUSED,
.flags = PCIE_RP_LTR | PCIE_RP_AER | PCIE_RP_CLK_REQ_UNUSED | PCIE_RP_PM_ENABLE,
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what is this flag? Doesn't seeem to exist

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at first i tried every option i could find, including this pm fleg enabling nonsense

Comment on lines 245 to 246
end
end
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@mkopec mkopec Dec 10, 2025

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too many ends? also please fix indentation

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mb, device domain 0 on is being ended right here

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that explains failed runs (they pointed to some random line so i was confused)

@wiktormowinski wiktormowinski force-pushed the vp66xx-parity branch 2 times, most recently from 10c84e0 to 5ba4106 Compare December 10, 2025 10:48
Upstream-Status: Inappropriate [Dasharo downstream]
Signed-off-by: Wiktor Mowinski <[email protected]>
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4 participants