Adding Some Logging

xenon-emu · Jan 29, 2025 · fc90903 · fc90903
1 parent 2d1f1df
commit fc90903
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Showing 20 changed files with 66 additions and 109 deletions.
diff --git a/Xenon/Base/Config.cpp b/Xenon/Base/Config.cpp
@@ -2,8 +2,6 @@
 
 #include <toml.hpp>
 
-#include <iostream>
-
 #include "Config.h"
 #include "Path_util.h"
 #include "Logging/Log.h"
@@ -33,9 +31,8 @@ static bool isFullscreen = false;
 Base::Log::Level currentLogLevel = Base::Log::Level::Info;
 
 // SMC.
-static int smcPowerOnReason =
-    0x11; // Valid values are: 0x11 (SMC_PWR_REAS_PWRBTN) and 0x12
-          // (SMC_PWR_REAS_EJECT).
+static int smcPowerOnReason = 0x11; // Valid values are: 0x11 (SMC_PWR_REAS_PWRBTN) and 0x12
+                                    // (SMC_PWR_REAS_EJECT).
 static int comPort = 2;
 static std::string com = "";
 
@@ -156,9 +153,9 @@ void saveConfig(const std::filesystem::path &path) {
     }
   } else {
     if (error) {
-      std::cout << "Filesystem error: " << error.message() << std::endl;
+      LOG_ERROR(Config, "Filesystem error: {}", error.message());
     }
-    LOG_INFO(Config, "Config not found. Saving new configuration file: {}", path.string());
+      LOG_INFO(Config, "Config not found. Saving new configuration file: {}", path.string());
   }
 
   // General.

diff --git a/Xenon/Core/NAND/NAND.cpp b/Xenon/Core/NAND/NAND.cpp
@@ -1,27 +1,28 @@
 // Copyright 2025 Xenon Emulator Project
 
+#include "Base/Logging/Log.h"
+
 #include "NAND.h"
 
 /********************Responsible for loading the NAND file********************/
 bool NAND::Load(const std::string filePath) {
-  std::cout << "NAND: Loading file " << filePath.c_str() << std::endl;
+  LOG_INFO(System, "NAND: Loading file {}", filePath.c_str());
 
   if (fopen_s(&inputFile, filePath.c_str(), "rb") != 0) {
-    std::cout << "NAND: Unable to load file!" << std::endl;
+    LOG_CRITICAL(System, "NAND: Unable to load file!");
     return false;
   }
 
   fseek(inputFile, 0, SEEK_END);
   rawFileSize = ftell(inputFile);
   fseek(inputFile, 0, SEEK_SET);
 
-  std::cout << "NAND: File size = 0x" << rawFileSize << " bytes." << std::endl;
+  LOG_INFO(System, "NAND: File size = 0x{} bytes.", rawFileSize);
 
   CheckMagic();
 
   if (!CheckMagic()) {
-    std::cout << "NAND: wrong magic found, Xbox 360 Retail NAND magic"
-              << "is 0xFF4F and Devkit NAND magic 0x0F4F." << std::endl;
+    LOG_ERROR(System, "NAND: wrong magic found, Xbox 360 Retail NAND magic is 0xFF4F and Devkit NAND magic 0x0F4F.");
     return false;
   }
 
@@ -37,7 +38,7 @@ bool NAND::Load(const std::string filePath) {
   CheckSpare();
 
   if (hasSpare) {
-    std::cout << "NAND: Image has spare." << std::endl;
+    LOG_INFO(System, "NAND: Image has spare.");
 
     // Check Meta Type
     imageMetaType = DetectSpareType();

diff --git a/Xenon/Core/NAND/NAND.h b/Xenon/Core/NAND/NAND.h
@@ -3,7 +3,6 @@
 #pragma once
 
 #include <fstream>
-#include <iostream>
 
 #include "Base/SystemDevice.h"
 

diff --git a/Xenon/Core/RootBus/HostBridge/PCIBridge/ETHERNET/Ethernet.cpp b/Xenon/Core/RootBus/HostBridge/PCIBridge/ETHERNET/Ethernet.cpp
@@ -1,5 +1,7 @@
 // Copyright 2025 Xenon Emulator Project
 
+#include "Base/Logging/Log.h"
+
 #include "Ethernet.h"
 
 #define XE_NET_STATUS_INT 0x0000004C
@@ -72,8 +74,7 @@ void Xe::PCIDev::ETHERNET::ETHERNET::Read(u64 readAddress, u64 *data,
     memcpy(data, &ethPciState.address1Reg, byteCount);
     break;
   default:
-    std::cout << "[WARN] Ethernet: Unknown PCI Reg being read 0x" << (u16)offset
-              << std::endl;
+    LOG_ERROR(ETH, "Unknown PCI Reg being read 0x{}", (u16)offset);
     memset(data, 0xFF, byteCount);
     break;
   }
@@ -144,8 +145,7 @@ void Xe::PCIDev::ETHERNET::ETHERNET::Write(u64 writeAddress, u64 data,
     ethPciState.address1Reg = static_cast<u32>(data);
     break;
   default:
-    std::cout << "[WARN] Ethernet: Unknown PCI Reg being written 0x"
-              << (u16)offset << " data = 0x" << data << std::endl;
+    LOG_ERROR(ETH, "Unknown PCI Reg being written 0x{} data = 0x{}", (u16)offset, data);
     break;
   }
 }

diff --git a/Xenon/Core/RootBus/HostBridge/PCIBridge/ETHERNET/Ethernet.h b/Xenon/Core/RootBus/HostBridge/PCIBridge/ETHERNET/Ethernet.h
@@ -6,8 +6,6 @@
 
 #pragma once
 
-#include <iostream>
-
 #include "Core/RootBus/HostBridge/PCIBridge/PCIDevice.h"
 
 namespace Xe {

diff --git a/Xenon/Core/RootBus/HostBridge/PCIBridge/HDD/HDD.cpp b/Xenon/Core/RootBus/HostBridge/PCIBridge/HDD/HDD.cpp
@@ -1,5 +1,7 @@
 // Copyright 2025 Xenon Emulator Project
 
+#include "Base/Logging/Log.h"
+
 #include "HDD.h"
 
 HDD::HDD(PCIBridge *parentPCIBridge) {
@@ -45,8 +47,7 @@ void HDD::Read(u64 readAddress, u64 *data, u8 byteCount) {
 
     memcpy(data, (u8 *)&ataDeviceState.ataReadState + regOffset, byteCount);
   } else {
-    std::cout << "ATA: Unknown register being accesed: (Read)0x" << regOffset
-              << std::endl;
+    LOG_ERROR(HDD, "ATA: Unknown register being accesed: (Read)0x{}", regOffset);
     memset(data, 0, byteCount);
   }
 }
@@ -121,8 +122,7 @@ void HDD::Write(u64 writeAddress, u64 data, u8 byteCount) {
 
     memcpy((u8 *)&ataDeviceState.ataWriteState + regOffset, &data, byteCount);
   } else {
-    std::cout << "ATA: Unknown register being accesed: (Write)0x" << regOffset
-              << std::endl;
+    LOG_ERROR(HDD, "ATA: Unknown register being accesed: (Write)0x{}", regOffset);
   }
 }
 
@@ -136,7 +136,7 @@ void HDD::ConfigWrite(u64 writeAddress, u64 data, u8 byteCount) {
 
 void HDD::ataCopyIdentifyDeviceData() {
   if (!ataDeviceState.readBuffer.empty())
-    std::cout << "HDD: Read Buffer not empty!" << std::endl;
+    LOG_ERROR(HDD, "Read Buffer not empty!");
 
   ataDeviceState.readBuffer.resize(sizeof(ATA_IDENTIFY_DATA));
 

diff --git a/Xenon/Core/RootBus/HostBridge/PCIBridge/HDD/HDD.h b/Xenon/Core/RootBus/HostBridge/PCIBridge/HDD/HDD.h
@@ -2,7 +2,6 @@
 
 #pragma once
 
-#include <iostream>
 #include <vector>
 
 #include "Core/RootBus/HostBridge/PCIBridge/PCIBridge.h"

diff --git a/Xenon/Core/RootBus/HostBridge/PCIBridge/ODD/ODD.cpp b/Xenon/Core/RootBus/HostBridge/PCIBridge/ODD/ODD.cpp
@@ -1,5 +1,7 @@
 // Copyright 2025 Xenon Emulator Project
 
+#include "Base/Logging/Log.h"
+
 #include "ODD.h"
 
 //
@@ -462,8 +464,7 @@ void ODD::processSCSICommand() {
 
     break;
   default:
-    std::cout << "ATAPI: Unknown SCSI Command requested: 0x"
-              << atapiState.scsiCBD.CDB12.OperationCode << std::endl;
+    LOG_ERROR(ODD, "Unknown SCSI Command requested: 0x{}", atapiState.scsiCBD.CDB12.OperationCode);
   }
 
   atapiState.atapiRegs.interruptReasonReg = IDE_INTERRUPT_REASON_IO;
@@ -566,9 +567,7 @@ void ODD::Read(u64 readAddress, u64 *data, u8 byteCount) {
       memcpy(data, &atapiState.atapiRegs.statusReg, byteCount);
       return;
     default:
-      std::cout << "ATAPI: Unknown Command Register Block register being read, "
-                   "command"
-                << "code = 0x" << atapiCommandReg << std::endl;
+      LOG_ERROR(ODD, "Unknown Command Register Block register being read, command code = 0x{}", atapiCommandReg);
       break;
     }
   } else {
@@ -584,9 +583,7 @@ void ODD::Read(u64 readAddress, u64 *data, u8 byteCount) {
       memcpy(data, &atapiState.atapiRegs.dmaTableOffsetReg, byteCount);
       break;
     default:
-      std::cout << "ATAPI: Unknown Control Register Block register being read, "
-                   "command"
-                << "code = 0x" << atapiControlReg << std::endl;
+      LOG_ERROR(ODD, "Unknown Control Register Block register being read, command code = 0x{}", atapiControlReg);
       break;
     }
   }
@@ -665,15 +662,12 @@ void ODD::Write(u64 writeAddress, u64 data, u8 byteCount) {
         atapiIdentifyCommand();
         return;
       default:
-        std::cout << "ATAPI: Unknown command, command code = 0x" << data
-                  << std::endl;
+        LOG_ERROR(ODD, "Unknown command, command code = 0x{}", data);
         break;
       }
       return;
     default:
-      std::cout << "ATAPI: Unknown Command Register Block register being "
-                   "written, command"
-                << "code = 0x" << atapiCommandReg << std::endl;
+      LOG_ERROR(ODD, "Unknown Command Register Block register being written, command code = 0x{}", atapiCommandReg);
       break;
     }
   } else {
@@ -696,9 +690,7 @@ void ODD::Write(u64 writeAddress, u64 data, u8 byteCount) {
       memcpy(&atapiState.atapiRegs.dmaTableOffsetReg, &data, byteCount);
       break;
     default:
-      std::cout << "ATAPI: Unknown Control Register Block register being "
-                   "written, command"
-                << "code = 0x" << atapiControlReg << std::endl;
+      LOG_ERROR(ODD, "Unknown Control Register Block register being written, command code = 0x{}", atapiControlReg);
       break;
     }
   }

diff --git a/Xenon/Core/RootBus/HostBridge/PCIBridge/ODD/ODD.h b/Xenon/Core/RootBus/HostBridge/PCIBridge/ODD/ODD.h
@@ -3,7 +3,6 @@
 #pragma once
 
 #include <Windows.h>
-#include <iostream>
 #include <vector>
 
 #include "Core/RAM/RAM.h"

diff --git a/Xenon/Core/RootBus/HostBridge/PCIBridge/PCIBridge.cpp b/Xenon/Core/RootBus/HostBridge/PCIBridge/PCIBridge.cpp
@@ -1,5 +1,7 @@
 // Copyright 2025 Xenon Emulator Project
 
+#include "Base/Logging/Log.h"
+
 #include "PCIBridge.h"
 #include "PCIBridgeConfig.h"
 
@@ -110,8 +112,7 @@ bool PCIBridge::isAddressMappedinBAR(u32 address) {
 }
 
 void PCIBridge::addPCIDevice(PCIDevice *device) {
-  std::cout << "PCI Bus > New device attatched: " << device->GetDeviceName()
-            << std::endl;
+  LOG_INFO(PCIBridge, "PCI Bus > New device attatched: {}", device->GetDeviceName());
 
   connectedPCIDevices.push_back(device);
 }
@@ -140,8 +141,7 @@ bool PCIBridge::Read(u64 readAddress, u64 *data, u8 byteCount) {
       *data = pciBridgeState.PRIO_REG_SFCX.hexData;
       break;
     default:
-      std::cout << "PCI Bridge: Unknown reg being read: 0x" << readAddress
-                << std::endl;
+      LOG_ERROR(PCIBridge, "Unknown reg being read: 0x{}", readAddress);
       break;
     }
     return true;
@@ -200,8 +200,7 @@ bool PCIBridge::Write(u64 writeAddress, u64 data, u8 byteCount) {
       pciBridgeState.PRIO_REG_SFCX.cpuIRQ = cpuIRQ;
       break;
     default:
-      std::cout << "PCI Bridge: Unknown reg being written: 0x" << writeAddress
-                << ", 0x" << data << std::endl;
+      LOG_ERROR(PCIBridge, "Unknown reg being written: 0x{}, 0x{}", writeAddress, data);
       break;
     }
     return true;
@@ -271,25 +270,20 @@ void PCIBridge::ConfigRead(u64 readAddress, u64 *data, u8 byteCount) {
     currentDevName = "5841";
     break;
   default:
-    std::cout << "PCI Config Space Read: Unknown device accessed: Dev 0x"
-              << configAddr.devNum << " Reg 0x" << configAddr.regOffset
-              << std::endl;
+    LOG_ERROR(PCIBridge, "PCI Config Space Read: Unknown device accessed: Dev 0x{}, Reg 0x{}", configAddr.devNum, configAddr.regOffset);
     return;
     break;
   }
 
   for (auto &device : connectedPCIDevices) {
     if (device->GetDeviceName() == currentDevName) {
       // Hit!
-      std::cout << "PCI Bus -> Config read, device: " << currentDevName
-                << " addr = 0x" << configAddr.regOffset << std::endl;
+      LOG_INFO(PCIBridge, "PCI Bus -> Config read, device: {} addr = 0x{}", currentDevName, configAddr.regOffset);
       device->ConfigRead(readAddress, data, byteCount);
       return;
     }
   }
-
-  std::cout << "PCI Read to unimplemented device: " << currentDevName.c_str()
-            << std::endl;
+  LOG_ERROR(PCIBridge, "PCI Read to unimplemented device: {}", currentDevName.c_str());
   *data = 0xFFFFFFFFFFFFFFFF;
 }
 
@@ -346,24 +340,18 @@ void PCIBridge::ConfigWrite(u64 writeAddress, u64 data, u8 byteCount) {
     currentDevName = "5841";
     break;
   default:
-    std::cout << "PCI Config Space Write: Unknown device accessed: Dev 0x"
-              << configAddr.devNum << " Func 0x" << configAddr.functNum
-              << " Reg 0x" << configAddr.regOffset << " data = 0x" << data
-              << std::endl;
+    LOG_ERROR(PCIBridge, "PCI Config Space Write: Unknown device accessed: Dev 0x{} Func 0x{} Reg 0x{} data = 0x{}", configAddr.devNum, configAddr.functNum, configAddr.regOffset, data);
     return;
     break;
   }
 
   for (auto &device : connectedPCIDevices) {
     if (device->GetDeviceName() == currentDevName) {
       // Hit!
-      std::cout << "PCI Bus -> Config write, device: " << currentDevName
-                << " addr = 0x" << configAddr.regOffset << " data = 0x" << data
-                << std::endl;
+      LOG_ERROR(PCIBridge, "PCI Bus -> Config write, device: {} addr = 0x{} data = 0x{}", currentDevName, configAddr.regOffset, data);
       device->ConfigWrite(writeAddress, data, byteCount);
       return;
     }
   }
-  std::cout << "PCI Write to unimplemented device: " << currentDevName.c_str()
-            << " data = 0x" << data << std::endl;
+  LOG_ERROR(PCIBridge, "PCI Write to unimplemented device: {} data = 0x{}", currentDevName.c_str(), data);
 }