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Base: More logging improvements.
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bitsh1ft3r committed Jan 29, 2025
1 parent d2b3ca6 commit f21e335
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Showing 13 changed files with 258 additions and 408 deletions.
2 changes: 1 addition & 1 deletion Xenon/Base/Logging/Filter.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -117,7 +117,7 @@ const char* GetLevelName(Level log_level) {
LVL(Warning);
LVL(Error);
LVL(Critical);
LVL(DebugPrint);
LVL(Guest);
case Level::Count:
default:
break;
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4 changes: 2 additions & 2 deletions Xenon/Base/Logging/Log.h
Original file line number Diff line number Diff line change
Expand Up @@ -67,7 +67,7 @@ void FmtLogMessage(Class log_class, Level log_level, const char* filename, unsig
Base::Log::FmtLogMessage(Base::Log::Class::log_class, Base::Log::Level::Critical, \
Base::Log::TrimSourcePath(__FILE__), __LINE__, __func__, \
__VA_ARGS__)
#define LOG_XBOX_DEBUGP(log_class, ...) \
Base::Log::FmtLogMessage(Base::Log::Class::log_class, Base::Log::Level::DebugPrint, \
#define LOG_XBOX(log_class, ...) \
Base::Log::FmtLogMessage(Base::Log::Class::log_class, Base::Log::Level::Guest, \
Base::Log::TrimSourcePath(__FILE__), __LINE__, __func__, \
__VA_ARGS__)
8 changes: 4 additions & 4 deletions Xenon/Base/Logging/Text_formatter.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -65,8 +65,8 @@ void PrintColoredMessage(const Entry& entry) {
case Level::Critical: // Bright magenta
color = FOREGROUND_RED | FOREGROUND_BLUE | FOREGROUND_INTENSITY;
break;
case Level::DebugPrint: // Green
color = FOREGROUND_GREEN;
case Level::Guest: // Bright green
color = FOREGROUND_GREEN | FOREGROUND_INTENSITY;
break;
case Level::Count:
UNREACHABLE();
Expand Down Expand Up @@ -95,8 +95,8 @@ void PrintColoredMessage(const Entry& entry) {
case Level::Critical: // Bright magenta
color = ESC "[1;35m";
break;
case Level::Xbox360: // Green
color = ESC "[0;32m";
case Level::Guest: // Green
color = ESC "[0;92m";
break;
case Level::Count:
UNREACHABLE();
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18 changes: 9 additions & 9 deletions Xenon/Base/Logging/Types.h
Original file line number Diff line number Diff line change
Expand Up @@ -10,15 +10,15 @@ namespace Base::Log {
enum class Level : u8 {
Trace, ///< Extremely detailed and repetitive debugging information that is likely to
///< pollute logs.
Debug, ///< Less detailed debugging information.
Info, ///< Status information from important points during execution.
Warning, ///< Minor or potential problems found during execution of a task.
Error, ///< Major problems found during execution of a task that prevent it from being
///< completed.
Critical, ///< Major problems during execution that threaten the stability of the entire
///< application.
DebugPrint, ///< Output from the guest system DebugPrints.
Count, ///< Total number of logging levels
Debug, ///< Less detailed debugging information.
Info, ///< Status information from important points during execution.
Warning, ///< Minor or potential problems found during execution of a task.
Error, ///< Major problems found during execution of a task that prevent it from being
///< completed.
Critical, ///< Major problems during execution that threaten the stability of the entire
///< application.
Guest, ///< Output from the guest system.
Count, ///< Total number of logging levels
};

/**
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8 changes: 4 additions & 4 deletions Xenon/Core/RootBus/HostBridge/HostBridge.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -48,7 +48,7 @@ bool HostBridge::Read(u64 readAddress, u64 *data, u8 byteCount) {
*data = biuRegs.REG_E1040000;
break;
default:
LOG_ERROR(HostBridge, "Unknown register being read at address: {0:#x}.",
LOG_ERROR(HostBridge, "Unknown register being read at address: {:#x}.",
readAddress);
*data = 0;
break;
Expand Down Expand Up @@ -143,7 +143,7 @@ bool HostBridge::Write(u64 writeAddress, u64 data, u8 byteCount) {
biuRegs.REG_E1040078 = static_cast<u32>(data);
break;
default:
LOG_ERROR(HostBridge, "Unknown register being written at address: {0:#x}, data: {0:#x}.",
LOG_ERROR(HostBridge, "Unknown register being written at address: {:#x}, data: {:#x}.",
writeAddress, data);
break;
}
Expand Down Expand Up @@ -183,7 +183,7 @@ void HostBridge::ConfigRead(u64 readAddress, u64 *data, u8 byteCount) {
xGPU->ConfigRead(readAddress, data, byteCount);
break;
default:
LOG_ERROR(HostBridge, "BUS0: Configuration read to inexistant PCI Device at address: {0:#x}.",
LOG_ERROR(HostBridge, "BUS0: Configuration read to inexistant PCI Device at address: {:#x}.",
readAddress);
break;
}
Expand Down Expand Up @@ -212,7 +212,7 @@ void HostBridge::ConfigWrite(u64 writeAddress, u64 data, u8 byteCount) {
xGPU->ConfigWrite(writeAddress, data, byteCount);
break;
default:
LOG_ERROR(HostBridge, "BUS0: Configuration Write to inexistant PCI Device at address: {0:#x}, data: {0:#x}.",
LOG_ERROR(HostBridge, "BUS0: Configuration Write to inexistant PCI Device at address: {:#x}, data: {:#x}.",
writeAddress, data);
break;
}
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21 changes: 12 additions & 9 deletions Xenon/Core/RootBus/HostBridge/PCIBridge/PCIBridge.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -94,6 +94,7 @@ bool PCIBridge::RouteInterrupt(u8 prio) {
}
break;
default:
LOG_ERROR(PCIBridge, "Unknown interrupt being routed: {:#x}", prio);
break;
}
return false;
Expand All @@ -112,7 +113,7 @@ bool PCIBridge::isAddressMappedinBAR(u32 address) {
}

void PCIBridge::addPCIDevice(PCIDevice *device) {
LOG_INFO(PCIBridge, "PCI Bus > New device attatched: {}", device->GetDeviceName());
LOG_INFO(PCIBridge, "Attatched: {}", device->GetDeviceName());

connectedPCIDevices.push_back(device);
}
Expand Down Expand Up @@ -141,7 +142,7 @@ bool PCIBridge::Read(u64 readAddress, u64 *data, u8 byteCount) {
*data = pciBridgeState.PRIO_REG_SFCX.hexData;
break;
default:
LOG_ERROR(PCIBridge, "Unknown reg being read: 0x{}", readAddress);
LOG_ERROR(PCIBridge, "Unknown reg being read: {:#x}", readAddress);
break;
}
return true;
Expand Down Expand Up @@ -200,7 +201,7 @@ bool PCIBridge::Write(u64 writeAddress, u64 data, u8 byteCount) {
pciBridgeState.PRIO_REG_SFCX.cpuIRQ = cpuIRQ;
break;
default:
LOG_ERROR(PCIBridge, "Unknown reg being written: 0x{}, 0x{}", writeAddress, data);
LOG_ERROR(PCIBridge, "Unknown reg being written: {:#x}, {:#x}", writeAddress, data);
break;
}
return true;
Expand Down Expand Up @@ -270,20 +271,21 @@ void PCIBridge::ConfigRead(u64 readAddress, u64 *data, u8 byteCount) {
currentDevName = "5841";
break;
default:
LOG_ERROR(PCIBridge, "PCI Config Space Read: Unknown device accessed: Dev 0x{}, Reg 0x{}", configAddr.devNum, configAddr.regOffset);
LOG_ERROR(PCIBridge, "Config Space Read: Unknown device accessed: Dev {:#x}, Reg{:#x}",
configAddr.devNum, configAddr.regOffset);
return;
break;
}

for (auto &device : connectedPCIDevices) {
if (device->GetDeviceName() == currentDevName) {
// Hit!
LOG_INFO(PCIBridge, "PCI Bus -> Config read, device: {} addr = 0x{}", currentDevName, configAddr.regOffset);
LOG_INFO(PCIBridge, "Config read, device: {} addr = {:#x}", currentDevName, configAddr.regOffset);
device->ConfigRead(readAddress, data, byteCount);
return;
}
}
LOG_ERROR(PCIBridge, "PCI Read to unimplemented device: {}", currentDevName.c_str());
LOG_ERROR(PCIBridge, "Read to unimplemented device: {}", currentDevName.c_str());
*data = 0xFFFFFFFFFFFFFFFF;
}

Expand Down Expand Up @@ -340,18 +342,19 @@ void PCIBridge::ConfigWrite(u64 writeAddress, u64 data, u8 byteCount) {
currentDevName = "5841";
break;
default:
LOG_ERROR(PCIBridge, "PCI Config Space Write: Unknown device accessed: Dev 0x{} Func 0x{} Reg 0x{} data = 0x{}", configAddr.devNum, configAddr.functNum, configAddr.regOffset, data);
LOG_ERROR(PCIBridge, "Config Space Write: Unknown device accessed: Dev {:#x} Func {:#x}"
"Reg {:#x} data = {:#x}", configAddr.devNum, configAddr.functNum, configAddr.regOffset, data);
return;
break;
}

for (auto &device : connectedPCIDevices) {
if (device->GetDeviceName() == currentDevName) {
// Hit!
LOG_ERROR(PCIBridge, "PCI Bus -> Config write, device: {} addr = 0x{} data = 0x{}", currentDevName, configAddr.regOffset, data);
LOG_INFO(PCIBridge, "Config write, device: {} addr = {:#x} data = {:#x}", currentDevName.c_str(), configAddr.regOffset, data);
device->ConfigWrite(writeAddress, data, byteCount);
return;
}
}
LOG_ERROR(PCIBridge, "PCI Write to unimplemented device: {} data = 0x{}", currentDevName.c_str(), data);
LOG_ERROR(PCIBridge, "Write to unimplemented device: {} data = {:#x}", currentDevName.c_str(), data);
}
16 changes: 8 additions & 8 deletions Xenon/Core/RootBus/HostBridge/PCIBridge/SMC/SMC.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -155,7 +155,7 @@ void Xe::PCIDev::SMC::SMCCore::Read(u64 readAddress, u64 *data, u8 byteCount) {
smcCoreState->fifoBufferPos += 4;
break;
default:
LOG_ERROR(SMC, "Unknown register being read, offset {0:#x}", static_cast<u16>(regOffset));
LOG_ERROR(SMC, "Unknown register being read, offset {:#x}", static_cast<u16>(regOffset));
break;
}
}
Expand Down Expand Up @@ -226,7 +226,7 @@ void Xe::PCIDev::SMC::SMCCore::Write(u64 writeAddress, u64 data, u8 byteCount) {
smcCoreState->fifoBufferPos += 4;
break;
default:
LOG_ERROR(SMC, "Unknown register being written, offset {0:#x}, data {0:#x}",
LOG_ERROR(SMC, "Unknown register being written, offset {:#x}, data {:#x}",
static_cast<u16>(regOffset), data);
break;
}
Expand Down Expand Up @@ -270,7 +270,7 @@ void Xe::PCIDev::SMC::SMCCore::setupUART(u32 uartConfig) {
smcCoreState->comPortDCB.StopBits = ONESTOPBIT;
break;
default:
LOG_WARNING(SMC, "SMCCore: Unknown UART config being set: ConfigValue = {0:#x}", uartConfig);
LOG_WARNING(SMC, "SMCCore: Unknown UART config being set: ConfigValue = {:#x}", uartConfig);
break;
}

Expand All @@ -280,19 +280,19 @@ void Xe::PCIDev::SMC::SMCCore::setupUART(u32 uartConfig) {
OPEN_EXISTING, 0, nullptr);

if (smcCoreState->comPortHandle == INVALID_HANDLE_VALUE) {
LOG_ERROR(SMC, "CreateFile failed with error {0:#x}. Make sure the Selected COM Port is avaliable "
LOG_ERROR(SMC, "CreateFile failed with error {:#x}. Make sure the Selected COM Port is avaliable "
"in your system.", GetLastError());
smcCoreState->uartPresent = false;
return;
}

// Get Current COM Port State
if (!GetCommState(smcCoreState->comPortHandle, &smcCoreState->comPortDCB)) {
LOG_ERROR(SMC, "UART: GetCommState failed with error {0:#x}.", GetLastError());
LOG_ERROR(SMC, "UART: GetCommState failed with error {:#x}.", GetLastError());
}
// Set The COM Port State as per config value.
if (!SetCommState(smcCoreState->comPortHandle, &smcCoreState->comPortDCB)) {
LOG_ERROR(SMC, "UART: SetCommState failed with error {0:#x}.", GetLastError());
LOG_ERROR(SMC, "UART: SetCommState failed with error {:#x}.", GetLastError());
}

LOG_INFO(SMC, "UART Initialized Successfully.");
Expand Down Expand Up @@ -438,7 +438,7 @@ void Xe::PCIDev::SMC::SMCCore::smcMainThread() {
(smcCoreState->fifoDataBuffer[7] << 24);
break;
default:
LOG_WARNING(SMC, "SMC_I2C_READ_WRITE: Unimplemented command {0:#x}",
LOG_WARNING(SMC, "SMC_I2C_READ_WRITE: Unimplemented command {:#x}",
smcCoreState->fifoDataBuffer[1]);
smcCoreState->fifoDataBuffer[0] = SMC_I2C_READ_WRITE;
smcCoreState->fifoDataBuffer[1] = 0x1; // Set R/W Failed.
Expand Down Expand Up @@ -517,7 +517,7 @@ void Xe::PCIDev::SMC::SMCCore::smcMainThread() {
LOG_WARNING(SMC, "Unimplemented SMC_FIFO_CMD: SMC_SET_9F_INT");
break;
default:
LOG_WARNING(SMC, "Unknown SMC_FIFO_CMD: ID = {0:#x}",
LOG_WARNING(SMC, "Unknown SMC_FIFO_CMD: ID = {:#x}",
static_cast<u16>(smcCoreState->fifoDataBuffer[0]));
break;
}
Expand Down
4 changes: 2 additions & 2 deletions Xenon/Core/RootBus/RootBus.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -49,7 +49,7 @@ void RootBus::Read(u64 readAddress, u64 *data, u8 byteCount) {
}

// Device not found.
LOG_ERROR(RootBus, "Read failed at address {0:#x}", readAddress);
LOG_ERROR(RootBus, "Read failed at address {:#x}", readAddress);

// Any reads to bus that dont belong to any device are always 0xFF.
*data = 0xFFFFFFFFFFFFFFFF;
Expand Down Expand Up @@ -78,7 +78,7 @@ void RootBus::Write(u64 writeAddress, u64 data, u8 byteCount) {
}

// Device or address not found.
LOG_ERROR(RootBus, "Write failed at address: {0:#x} data: {0:#x}", writeAddress, data);
LOG_ERROR(RootBus, "Write failed at address: {:#x} data: {:#x}", writeAddress, data);
}

//
Expand Down
4 changes: 2 additions & 2 deletions Xenon/Core/XCPU/Interpreter/PPCInterpreter.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -731,7 +731,7 @@ case PPCInstruction::td:
break;
default:
LOG_CRITICAL(Xenon, "PPC Interpreter: Unknown or unimplemented instruction found: "
"data: {0:#x}, address: {0:#x}, OpCode: {}.", hCore->ppuThread[hCore->currentThread].CI,
"data: {:#x}, address: {:#x}, OpCode: {}.", hCore->ppuThread[hCore->currentThread].CI,
hCore->ppuThread[hCore->currentThread].CIA, getOpcodeName(hCore->ppuThread[hCore->currentThread].CI));
break;
}
Expand Down Expand Up @@ -922,7 +922,7 @@ void PPCInterpreter::ppcInterpreterTrap(PPU_STATE *hCore, u32 trapNumber) {
dbgString[idx] = MMURead8(
hCore, hCore->ppuThread[hCore->currentThread].GPR[0x3] + idx);
}
LOG_XBOX_DEBUGP(Guest, "{}", dbgString.c_str());
LOG_XBOX(Guest, "DebugPrint: {}", dbgString.c_str());
}

if (trapNumber == 0x17) {
Expand Down
8 changes: 4 additions & 4 deletions Xenon/Core/XCPU/Interpreter/PPC_MMU.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1191,7 +1191,7 @@ u64 PPCInterpreter::MMURead(XENON_CONTEXT *cpuContext, PPU_STATE *ppuState,
data = cpuContext->fuseSet.fuseLine11;
break;
default:
LOG_ERROR(Xenon_MMU, "Reading to unknown fuse at address {0:#x}", EA);
LOG_ERROR(Xenon_MMU, "Reading to unknown fuse at address {:#x}", EA);
break;
}

Expand Down Expand Up @@ -1240,7 +1240,7 @@ u64 PPCInterpreter::MMURead(XENON_CONTEXT *cpuContext, PPU_STATE *ppuState,
}

if (socRead && nand != true && pciBridge != true && pciConfigSpace != true) {
LOG_WARNING(Xenon_MMU, "SoC Read from {0:#x}, returning 0.", EA);
LOG_WARNING(Xenon_MMU, "SoC Read from {:#x}, returning 0.", EA);
data = 0;
return data;
}
Expand Down Expand Up @@ -1297,7 +1297,7 @@ void PPCInterpreter::MMUWrite(XENON_CONTEXT *cpuContext, PPU_STATE *ppuState,
// CPU VID Register
if (socWrite && EA == 0x61188) {
if (data != 0) {
LOG_WARNING(Xenon, "(SOC): New VID value being set: {0:#x}", data);
LOG_WARNING(Xenon, "(SOC): New VID value being set: {:#x}", data);
}
return;
}
Expand Down Expand Up @@ -1348,7 +1348,7 @@ void PPCInterpreter::MMUWrite(XENON_CONTEXT *cpuContext, PPU_STATE *ppuState,
}

if (socWrite && nand != true && pciBridge != true && pciConfigSpace != true) {
LOG_WARNING(Xenon_MMU, "SoC Write to {0:#x}, data = {0:#x}, invalidating.", EA, data);
LOG_WARNING(Xenon_MMU, "SoC Write to {:#x}, data = {:#x}, invalidating.", EA, data);
return;
}

Expand Down
4 changes: 2 additions & 2 deletions Xenon/Core/XCPU/Interpreter/PPC_System.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -652,7 +652,7 @@ void PPCInterpreter::PPCInterpreter_mfspr(PPU_STATE *hCore) {
value = hCore->SPR.CTRL;
break;
default:
LOG_ERROR(Xenon_PostBus, "mfspr: Unknown SPR: 0x{0:#x}", sprNum);
LOG_ERROR(Xenon_PostBus, "mfspr: Unknown SPR: 0x{:#x}", sprNum);
break;
}

Expand Down Expand Up @@ -792,7 +792,7 @@ void PPCInterpreter::PPCInterpreter_mtspr(PPU_STATE *hCore) {
(hCore->ppuThread[hCore->currentThread].GPR[rD] << 32);
break;
default:
LOG_ERROR(Xenon_PostBus, "{} SPR {0:#d} = 0x{0:#x}", hCore->ppuName, spr, hCore->ppuThread[hCore->currentThread].GPR[rD]);
LOG_ERROR(Xenon_PostBus, "{} SPR {0:#d} = 0x{:#x}", hCore->ppuName, spr, hCore->ppuThread[hCore->currentThread].GPR[rD]);
break;
}
}
Expand Down
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