This respository is a simple Amaranth HDL project template. The main purpose is to help AmaranthHDL users set-up a readdy-to-use project in a minite. Reference:
- Amaranth-HDL: GTKWave + Amaranth + Yosys
- Sphinx is required to enable the docs gen features.
- Make is required to run the tools in this project. Linux and Mac user should already have it installed, Windows user may need MSYS, WSL, or cmake/gmake ...
Init the empty folders before run:
make init
python unittest is used in this project, to test it, in the project root folder, run:
make unittest
A clean version of verilog file is generated by default. in the project root folder, run:
make verilog
And check the generated verilog file at hw/gen.
If you want the src comments for debug, run:
make verilog-dbg
Sphinx is used for automatic doc generation. to test it, in the project root folder, run:
make docs
and check the result at docs/build/html/index.html.
- change the project_name.Top at verilog and verilog-dbg
- change the project information: project, copyright, author, and release
- change the "html_theme": alabaster/classic/sphinxdoc/agogo/traditional/nature/pyramid/bizstyle
- change the folder name and the amaranth module files