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πŸ“‹ Vyges Metadata Specification - Standardized format for hardware IP discovery and integration

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Vyges Metadata Specification

License: Apache 2.0 Schema Version JSON Schema CI/CD Contributions Welcome

πŸ“‹ Standardized format for hardware IP discovery and integration in the Vyges ecosystem.

Overview

The Vyges Metadata Specification defines a standardized JSON Schema format for describing reusable silicon IP blocks. This specification enables automated discovery, integration, and management of hardware IP across different design flows and platforms.

Quick Start

Schema Location

  • Latest Version: schema/v1/vyges-metadata.schema.json
  • UI Schema: schema/v1/vyges-metadata.ui-schema.json

Interactive Schema Viewer

  • Location: schemaview/schema-tree.html
  • Features: Interactive D3.js tree visualization of the 814-node schema with depth 6
  • Usage: Open in browser to explore the schema structure with zoom, pan, and node expansion
  • Download: Export watermarked SVG with "Β© 2025 Vyges. All Rights Reserved"

Basic Example

{
  "name": "vyges/spi-controller",
  "x-version": "1.0.0",
  "description": "SPI master controller with configurable clock divider",
  "license": "Apache-2.0",
  "maturity": "production",
  "target": ["asic", "fpga"],
  "design_type": ["digital"],
  "interfaces": [
    {
      "name": "spi",
      "type": "bus",
      "direction": "output",
      "protocol": "spi",
      "width": 4,
      "signals": [
        {
          "name": "sclk",
          "direction": "output",
          "type": "clock",
          "description": "SPI clock signal"
        },
        {
          "name": "mosi",
          "direction": "output",
          "type": "data",
          "description": "Master out, slave in"
        },
        {
          "name": "miso",
          "direction": "input",
          "type": "data",
          "description": "Master in, slave out"
        },
        {
          "name": "cs_n",
          "direction": "output",
          "type": "control",
          "description": "Chip select (active low)"
        }
      ]
    }
  ],
  "template": "[email protected]",
  "fpga": {
    "toolchain": "vivado",
    "board": "arty-a7-35"
  },
  "asic": {
    "flavor": "digital",
    "pdks": ["sky130B"],
    "synthesis_tool": "openlane"
  }
}

Key Features

  • Platform Agnostic: Supports ASIC, FPGA, and mixed-signal designs
  • Automation Ready: Structured for automated IP integration and validation
  • Rich Metadata: Comprehensive information for IP discovery and evaluation
  • Extensible: Custom fields and vendor-specific extensions supported
  • Validation: JSON Schema validation with rich examples and documentation

Schema Structure

Core Fields (Required)

  • name: Unique package identifier
  • x-version: Schema version for tracking purposes
  • license: SPDX-compatible license
  • interfaces: Port definitions and protocols
  • template: Template name and version used
  • target: Supported platforms (asic/fpga)
  • design_type: IP category (digital/analog/mixed-signal/hard-ip)
  • maturity: Development lifecycle stage

Enhanced Fields (Recommended)

  • parameters: Configurable design parameters
  • dependencies: Required IP blocks and tools
  • performance: Timing, power, and area metrics
  • reliability: Quality and compliance information
  • commercial: Licensing and support details

Chiplet Integration Support

  • Chiplet Integration: Comprehensive metadata for multi-die systems via chipletIntegration property
  • Die-to-Die Interfaces: UCIe, AIB, BoW, EMIB protocol support
  • Packaging Constraints: Interposer, bump map, and thermal requirements
  • Multi-Die Testing: Test coverage and validation requirements
  • Power Domains: SoC/Chiplet partitioning and power management
  • Lifecycle Tracking: Supply chain and certification metadata

Protocol Specifications

  • UCIe: Universal Chiplet Interconnect Express
  • AIB: Advanced Interface Bus
  • BoW: Bunch of Wires
  • EMIB: Embedded Multi-die Interconnect Bridge

Usage

Validation

# Using jq for basic validation
jq -e . your-metadata.json > /dev/null

# Using our validation script (recommended)
npm install
node validate-examples.js

# Validate schema only
node validate-examples.js --schema-only

# Using ajv-cli (legacy, limited draft 2020-12 support)
npm install -g ajv-cli
ajv validate -s schema/v1/vyges-metadata.schema.json -d your-metadata.json

Schema Visualization

# Navigate to schemaview directory
cd schemaview

# Install dependencies
npm install

# Convert schema to tree format
npm run convert

# Open interactive viewer
open schema-tree.html

Integration

The schema is designed for integration with:

  • EDA tools and design flows
  • IP catalogs and marketplaces
  • CI/CD pipelines
  • Documentation generators

Contributing

We welcome contributions! Please see our Contributing Guidelines for details.

Getting Started

  1. Fork the repository
  2. Create a feature branch
  3. Make your changes
  4. Add tests if applicable
  5. Submit a pull request

Reporting Issues

Found a bug or have a suggestion? Please open an issue.

Versioning

This specification follows Semantic Versioning. The current schema version is 1.0.0.

Version History

  • 1.0.0 (2025-01): Initial public release with draft 2020-12 JSON Schema support
  • 1.0.0 (2025-08): Added chiplet integration support with comprehensive metadata structure
  • 1.0.0 (2025-08): Enhanced schema with 814 nodes, improved validation, and rich examples

License

This specification is licensed under the Apache License 2.0. See LICENSE for details.

Support

Related Projects


Maintained by: Vyges Inc.
Specification Version: 1.0.0
Last Updated: August 2025

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πŸ“‹ Vyges Metadata Specification - Standardized format for hardware IP discovery and integration

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