Projects using the Sipeed Tang Primer FPGA development board
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Dec 6, 2020 - Verilog
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sipeed-tang-primer
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OpenSource tool usage for TangPrimer 20K with the DockExt Board
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Mar 17, 2025 - Makefile
This project implements a BCD (Binary-Coded Decimal) converter that reads DIP switch input and controls a 7-segment display, showing digits 0–8 or ‘E’ for invalid combinations.
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May 5, 2025 - Verilog
First steps with the Sipeed Tang Primer 20k FPGA.
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May 5, 2025 - Verilog
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