feat(dmamap): add DmaMap::sync method #647
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Signed-off-by: Koichi <[email protected]>
Signed-off-by: Koichi <[email protected]>
Signed-off-by: Koichi <[email protected]>
Signed-off-by: Koichi <[email protected]>
Signed-off-by: Koichi <[email protected]>
Signed-off-by: Koichi <[email protected]>
Signed-off-by: Koichi <[email protected]>
Signed-off-by: Koichi <[email protected]>
ytakano
approved these changes
Oct 16, 2025
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Description
This PR completes the DMA mapping layer by adding synchronization operations for bounce buffers and cache coherency, plus integration with pre-allocated DMA pools.
DMA Synchronization (sync method)
PreWrite: Copies from original to bounce buffer before device writesPostRead: Copies from bounce buffer to original after device readsDesign Decisions
Deferred cache operations:
The current implementation uses memory barriers as a placeholder for full cache management. While sufficient for cache-coherent systems (like most x86_64), proper cache invalidation/flush operations are needed for non-coherent architectures. The TODO comments mark where architecture-specific cache operations should be added when non-coherent device support is required.
Related links
bus_dmamap_sync
https://github.com/openbsd/src/blob/95647c95e86787fd3d10394754ce3752dc75799c/sys/arch/amd64/amd64/bus_dma.c#L515
How was this PR tested?
Notes for reviewers