PCIE Device Passthrough Refactoring

Cargo.toml

@@ -50,6 +50,12 @@ iommu = [] # supported by: aarch64
 pci = [] # supported by: aarch64, loongarch64
 print_timestamp = [] # print timestamp when logging
 
+############# PCIe access mechanism ##############
+ecam_pcie = [] # Standard ECAM mechanism (default for most platforms)
+dwc_pcie = [] # DesignWare PCIe Core mechanism (CFG0/CFG1, used by RK3568)
+loongarch64_pcie = [] # LoongArch PCIe mechanism (used by LoongArch platforms)
+no_pcie_bar_realloc = []
+
 ############# aarch64 ##############
 # irqchip driver
 gicv2 = []

platform/aarch64/imx8mp/configs/zone1-ruxos.json

@@ -74,5 +74,5 @@
     },
     "num_pci_devs": 0,
     "alloc_pci_devs": [],
-    "pci_config": {}
+    "pci_config": []
 }

platform/aarch64/qemu-gicv2/board.rs

@@ -19,8 +19,11 @@ use crate::{
         zone::{GicConfig, Gicv2Config, HvArchZoneConfig},
     },
     config::*,
+    pci::vpci_dev::VpciDevType,
 };
 
+use crate::pci_dev;
+
 pub const BOARD_NAME: &str = "qemu-gicv2";
 
 pub const BOARD_NCPUS: usize = 4;
@@ -92,20 +95,30 @@ pub const ROOT_ARCH_ZONE_CONFIG: HvArchZoneConfig = HvArchZoneConfig {
     }),
 };
 
-pub const ROOT_PCI_CONFIG: HvPciConfig = HvPciConfig {
-    ecam_base: 0x4010000000,
-    ecam_size: 0x10000000,
-    io_base: 0x3eff0000,
-    io_size: 0x10000,
-    pci_io_base: 0x0,
-    mem32_base: 0x10000000,
-    mem32_size: 0x2eff0000,
-    pci_mem32_base: 0x10000000,
-    mem64_base: 0x8000000000,
-    mem64_size: 0x8000000000,
-    pci_mem64_base: 0x8000000000,
-};
+
+pub const ROOT_PCI_CONFIG: [HvPciConfig; 1] = [
+    HvPciConfig {
+        ecam_base: 0x4010000000,
+        ecam_size: 0x10000000,
+        io_base: 0x3eff0000,
+        io_size: 0x10000,
+        pci_io_base: 0x0,
+        mem32_base: 0x10000000,
+        mem32_size: 0x2eff0000,
+        pci_mem32_base: 0x10000000,
+        mem64_base: 0x8000000000,
+        mem64_size: 0x8000000000,
+        pci_mem64_base: 0x8000000000,
+        bus_range_begin: 0x0,
+        bus_range_end: 0xff,
+        domain: 0x0,
+    }
+];
 
 pub const ROOT_ZONE_IVC_CONFIG: [HvIvcConfig; 0] = [];
 
-pub const ROOT_PCI_DEVS: [u64; 2] = [0, 1 << 3];
+pub const ROOT_PCI_DEVS: [HvPciDevConfig; 3] = [
+    pci_dev!(0x0, 0x0, 0x0, 0x0, VpciDevType::Physical),
+    pci_dev!(0x0, 0x0, 0x1, 0x0, VpciDevType::Physical),
+    pci_dev!(0x0, 0x0, 0x2, 0x0, VpciDevType::Physical),
+];

platform/aarch64/qemu-gicv2/image/dts/zone0.dts

@@ -85,6 +85,24 @@
 		compatible = "arm,armv8-timer\0arm,armv7-timer";
 	};
 
+	pcie@10000000 {
+		interrupt-map-mask = <0x1800 0x00 0x00 0x07>;
+		interrupt-map = <0x00 0x00 0x00 0x01 0x01 0x00 0x00 0x00 0x03 0x04 0x00 0x00 0x00 0x02 0x01 0x00 0x00 0x00 0x04 0x04 0x00 0x00 0x00 0x03 0x01 0x00 0x00 0x00 0x05 0x04 0x00 0x00 0x00 0x04 0x01 0x00 0x00 0x00 0x06 0x04 0x800 0x00 0x00 0x01 0x01 0x00 0x00 0x00 0x04 0x04 0x800 0x00 0x00 0x02 0x01 0x00 0x00 0x00 0x05 0x04 0x800 0x00 0x00 0x03 0x01 0x00 0x00 0x00 0x06 0x04 0x800 0x00 0x00 0x04 0x01 0x00 0x00 0x00 0x03 0x04 0x1000 0x00 0x00 0x01 0x01 0x00 0x00 0x00 0x05 0x04 0x1000 0x00 0x00 0x02 0x01 0x00 0x00 0x00 0x06 0x04 0x1000 0x00 0x00 0x03 0x01 0x00 0x00 0x00 0x03 0x04 0x1000 0x00 0x00 0x04 0x01 0x00 0x00 0x00 0x04 0x04 0x1800 0x00 0x00 0x01 0x01 0x00 0x00 0x00 0x06 0x04 0x1800 0x00 0x00 0x02 0x01 0x00 0x00 0x00 0x03 0x04 0x1800 0x00 0x00 0x03 0x01 0x00 0x00 0x00 0x04 0x04 0x1800 0x00 0x00 0x04 0x01 0x00 0x00 0x00 0x05 0x04>;
+		#interrupt-cells = <0x01>;
+		ranges = <0x1000000 0x00 0x00 0x00 0x3eff0000 0x00 0x10000 
+		0x2000000 0x00 0x10000000 0x00 0x10000000 0x00 0x2eff0000 
+		0x3000000 0x80 0x00 0x80 0x00 0x80 0x00>;
+		reg = <0x40 0x10000000 0x00 0x10000000>;
+		msi-map = <0x00 0x8006 0x00 0x10000>;
+		dma-coherent;
+		bus-range = <0x00 0xff>;
+		linux,pci-domain = <0x00>;
+		#size-cells = <0x02>;
+		#address-cells = <0x03>;
+		device_type = "pci";
+		compatible = "pci-host-ecam-generic";
+	};
+
 	virtio_mmio@a003a00 {
 		dma-coherent;
 		interrupt-parent = <0x01>;

platform/aarch64/qemu-gicv3/board.rs

@@ -19,7 +19,11 @@ use crate::{
         zone::{GicConfig, Gicv3Config, HvArchZoneConfig},
     },
     config::*,
+    pci::vpci_dev::VpciDevType,
 };
+
+use crate::pci_dev;
+
 pub const BOARD_NAME: &str = "qemu-gicv3";
 
 pub const BOARD_NCPUS: usize = 4;
@@ -51,7 +55,7 @@ pub const ROOT_ZONE_CPUS: u64 = (1 << 0) | (1 << 1);
 
 pub const ROOT_ZONE_NAME: &str = "root-linux";
 
-pub const ROOT_ZONE_MEMORY_REGIONS: [HvConfigMemoryRegion; 3] = [
+pub const ROOT_ZONE_MEMORY_REGIONS: &[HvConfigMemoryRegion] = &[
     HvConfigMemoryRegion {
         mem_type: MEM_TYPE_RAM,
         physical_start: 0x50000000,
@@ -89,7 +93,7 @@ pub const ROOT_ARCH_ZONE_CONFIG: HvArchZoneConfig = HvArchZoneConfig {
     }),
 };
 
-pub const ROOT_PCI_CONFIG: HvPciConfig = HvPciConfig {
+pub const ROOT_PCI_CONFIG: [HvPciConfig; 1] = [HvPciConfig {
     ecam_base: 0x4010000000,
     ecam_size: 0x10000000,
     io_base: 0x3eff0000,
@@ -101,8 +105,16 @@ pub const ROOT_PCI_CONFIG: HvPciConfig = HvPciConfig {
     mem64_base: 0x8000000000,
     mem64_size: 0x8000000000,
     pci_mem64_base: 0x8000000000,
-};
+    bus_range_begin: 0,
+    bus_range_end: 0xff,
+    domain: 0x0,
+}];
 
 pub const ROOT_ZONE_IVC_CONFIG: [HvIvcConfig; 0] = [];
 
-pub const ROOT_PCI_DEVS: [u64; 2] = [0, 1 << 3];
+pub const ROOT_PCI_DEVS: &[HvPciDevConfig] = &[
+    pci_dev!(0x0, 0x0, 0x0, 0x0, VpciDevType::Physical),
+    pci_dev!(0x0, 0x0, 0x1, 0x0, VpciDevType::Physical),
+    pci_dev!(0x0, 0x0, 0x2, 0x0, VpciDevType::Physical),
+    pci_dev!(0x0, 0x0, 0x5, 0x0, VpciDevType::StandardVdev),
+];

platform/aarch64/qemu-gicv3/cargo/features

@@ -2,3 +2,4 @@ gicv3
 pl011
 iommu
 pci
+ecam_pcie

platform/aarch64/qemu-gicv3/configs/zone1-linux.json

@@ -1,5 +1,4 @@
 {
-    "arch": "arm64",
     "name": "linux2",
     "zone_id": 1,
     "cpus": [2, 3],
@@ -12,22 +11,15 @@
         },
         {
             "type": "virtio",
-            "physical_start": "0xa003800",
-            "virtual_start": "0xa003800",
-            "size": "0x200"
-        },
-        {
-            "type": "virtio",
-            "physical_start": "0xa003c00",
-            "virtual_start": "0xa003c00",
-            "size": "0x200"
+            "physical_start": "0xa000000",
+            "virtual_start": "0xa000000",
+            "size": "0x4000"
         }
     ],
     "interrupts": [76, 78],
     "ivc_configs": [],
-    "kernel_filepath": "Image",
-    "kernel_args": "",
-    "dtb_filepath": "zone1-linux.dtb",
+    "kernel_filepath": "./Image",
+    "dtb_filepath": "./linux2.dtb",
     "kernel_load_paddr": "0x50400000",
     "dtb_load_paddr":   "0x50000000",
     "entry_point":      "0x50400000",
@@ -38,9 +30,10 @@
         "gicr_base": "0x80a0000",
         "gicr_size": "0xf60000",
         "gits_base": "0x8080000",
-        "gits_size": "0x20000"
+        "gits_size": "0x20000",
+        "is_aarch32": false
     },
-    "pci_config": {
+    "pci_config": [{
         "ecam_base": "0x4010000000",
         "ecam_size": "0x10000000",
         "io_base": "0x3eff0000",
@@ -51,8 +44,25 @@
         "pci_mem32_base": "0x10000000",
         "mem64_base": "0x8000000000",
         "mem64_size": "0x8000000000",
-        "pci_mem64_base": "0x8000000000"
-    },
+        "pci_mem64_base": "0x8000000000",
+        "bus_range_begin": "0x0",
+        "bus_range_end": "0x1f" 
+    }],
     "num_pci_devs": 2,
-    "alloc_pci_devs": [0, 16]
+    "alloc_pci_devs": [
+        {
+            "domain": "0x0",
+            "bus": "0x0",
+            "device": "0x0",
+            "function": "0x0",
+            "dev_type": "0"
+        },
+        {
+            "domain": "0x0",
+            "bus": "0x0",
+            "device": "0x1",
+            "function": "0x0",
+            "dev_type": "0"
+        }
+    ]
 }