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Merge pull request #90 from siliconcompiler/rename_ram_impl_instances
Fix Verilator Warnings
2 parents 29c23dc + 0b7bec5 commit fce9df2

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2 files changed

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-2
lines changed

2 files changed

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-2
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lambdalib/ramlib/rtl/la_dpram.v

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -53,7 +53,7 @@ module la_dpram #(
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.PROP (PROP),
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.CTRLW (CTRLW),
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.TESTW (TESTW)
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) ram (
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) memory (
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.wr_clk (wr_clk),
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.wr_ce (wr_ce),
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.wr_we (wr_we),

lambdalib/ramlib/rtl/la_spram.v

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -49,7 +49,7 @@ module la_spram #(
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.PROP (PROP),
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.CTRLW (CTRLW),
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.TESTW (TESTW)
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) ram (
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) memory (
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.clk (clk),
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.ce (ce),
5555
.we (we),

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