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riscv-rt: Add mtvec-align features for the vector table alignment #259

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riscv-rt: Add mtvec-align features for the vector table alignment #259

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a0fac61
riscv-rt: Align _vector_table to 256 instead of 4
ia0 Jan 20, 2025
3663237
Add mtvec-align-{16,64,256} features
ia0 Jan 21, 2025
41029d7
Fix lint
ia0 Jan 21, 2025
609bb86
accidental change
ia0 Jan 21, 2025
b541401
Use RISCV_RT_MTVEC_ALIGN
ia0 Jan 21, 2025
2214449
Support older compilers
ia0 Jan 21, 2025
be579bf
Factorize with riscv-macros
ia0 Jan 21, 2025
5f46362
fix clippy
ia0 Jan 21, 2025
c14faa3
review suggestions
ia0 Jan 21, 2025
2ed7cd3
Make _vector_table strong
ia0 Jan 21, 2025
cfb7128
Gate pac_enum with v-trap since only the generated vector table is gated
ia0 Jan 21, 2025
dc19d13
Gate generated code
ia0 Jan 22, 2025
4c9c333
Update documentation
ia0 Jan 22, 2025
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3 changes: 2 additions & 1 deletion riscv-rt/CHANGELOG.md
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Expand Up @@ -9,7 +9,8 @@ and this project adheres to [Semantic Versioning](http://semver.org/).

### Changed

- Ensure the `.heap` section is 4-byte aligned
- Ensure the vector table is 256-byte aligned.
- Ensure the `.heap` section is 4-byte aligned.
- Limit rustc cfg flags to `riscvi`, `riscvm`, `riscvf`, and `riscvd`.
- Temporary use of `RISCV_RT_LLVM_ARCH_PATCH` environment variable to include the
temporary patch required for avoid LLVM spurious errors.
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2 changes: 1 addition & 1 deletion riscv-rt/src/interrupts.rs
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Expand Up @@ -81,7 +81,7 @@ core::arch::global_asm!(
.type _vector_table, @function

.option push
.balign 0x4 // TODO check if this is the correct alignment
.balign 0x100 // RISC-V requires 4, but implementations may be stricter
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.option norelax
.option norvc

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