Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Fix fields for xpm CSRs #42

Open
wants to merge 1 commit into
base: master
Choose a base branch
from
Open

Fix fields for xpm CSRs #42

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
Binary file modified zjpm-spec.pdf
View file
Open in desktop
Binary file not shown.
8 changes: 4 additions & 4 deletions zjpm/instructions.adoc
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,7 @@ Most bits in the register are currently unused. The remaining bits are reserved
[%header, cols=2*]
.Figure 1: Pointer Masking register for U-mode (_**upm**_)
,===
upm[XLEN-1:2], upm[1], upm[0]
upm[XLEN-1:1], upm[0]
WPRI, uxpmen (WARL)
,===

Expand Down Expand Up @@ -52,21 +52,21 @@ The upm register (<<_unprivileged_isa_extensions>>) is visible to all privilege
[%header, cols=2*]
.Figure 2a: Pointer Masking register for M-mode (_**mpm**_)
,===
mpm[XLEN-1:2], mpm[1], mpm[0]
mpm[XLEN-1:1], mpm[0]
WPRI, mxpmen (WARL)
,===

[%header, cols=2*]
.Figure 2b: Pointer Masking register for S-mode (_**spm**_)
,===
spm[XLEN-1:2], spm[1], spm[0]
spm[XLEN-1:1], spm[0]
WPRI, sxpmen (WARL)
,===

[%header, cols=2*]
.Figure 2c: Pointer Masking register for virtualized S-mode (_**vspm**_)
,===
vspm[XLEN-1:2], vspm[1], vspm[0]
vspm[XLEN-1:1], vspm[0]
WPRI, vsxpmen (WARL)
,===

Expand Down