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@christian-herber-nxp
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I am actually considering placing xcause in a0 instead to have consistency between interrupts and synchronous exceptions.
Otherwise, you would need a different behavior between vectored and non-vectored interrupts, which is an additional complication.

@christian-herber-nxp
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This PR introduces an atomicity issue.
For vectored interrupts, the identities need to be sampled at the time of the trap.
Otherwise, a higher priority interrupt that gets pending meanwhile will change the value of xtop*i CSRs

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Tpush should pass major and minor interrupt identity to handlers

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