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x86_64: avoid accessing MSR registers when do trap/syscall #14

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merged 1 commit into from
Jul 8, 2024

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@cqs21 cqs21 commented Jul 3, 2024

FSGSBASE instructions would provide better performance.

@equation314 equation314 merged commit 72a1a72 into rcore-os:master Jul 8, 2024
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equation314 added a commit that referenced this pull request Jul 11, 2024
x86_64: avoid accessing MSR registers when do trap/syscall
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2 participants