Add baremetal RISC-V smoke tests (rv32, rv64) by luhenry · Pull Request #19917 · pytorch/executorch

luhenry · 2026-06-01T16:48:55Z

Summary

This adds testing on CI and with local script of the portable backend on baremetal for RISC-V. It cross-compiles with riscv64-unknown-elf + picolibc, embeds the .bpte into the ELF, and runs under qemu-system-riscv{32,64} with semihosting. We use the same bundled-IO PASS criterion as the existing linux runs for pass/fail.

Test plan

The CI is the testing plan as we add configurations to CI. I've validated it works locally with examples/riscv/test-matrix.sh.

cc @psiddh @AdrianLundell @digantdesai @rascani

pytorch-bot · 2026-06-01T16:49:00Z

🔗 Helpful Links

🧪 See artifacts and rendered test results at hud.pytorch.org/pr/pytorch/executorch/19917

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❌ 1 New Failure, 1 Cancelled Job, 1 Unrelated Failure, 14 Unclassified Failures

As of commit 4b616c0 with merge base 4469d84 ():

NEW FAILURE - The following job has failed:

trunk / test-qnn-optimum-model (fp32, distilbert) / linux-job (gh)
RuntimeError: Command docker exec -t 4a35c99ea9644e45a477c2bde700f7f8fe262167dc963d0cae3537db18bffb6c /exec failed with exit code 92

UNCLASSIFIED FAILURES - DrCI could not classify the following jobs because the workflow did not run on the merge base. The failures may be pre-existing on trunk or introduced by this PR:

Build macOS Wheels / pytorch/executorch / build-wheel-py3_10-cpu (gh) (this job did not run on the merge base, so DrCI cannot tell whether the failure is pre-existing)
Process completed with exit code 1.
Build macOS Wheels / pytorch/executorch / upload / upload-wheel-py3_10-cpu (gh) (this job did not run on the merge base, so DrCI cannot tell whether the failure is pre-existing)
Unable to download artifact(s): Artifact not found for name: pytorch_executorch__3.10_cpu_
Test RISC-V Backend / test-riscv (add, false, portable, baremetal, rv32) / run / linux-job (gh) (this job did not run on the merge base, so DrCI cannot tell whether the failure is pre-existing)
/pytorch/executorch/extension/llm/tokenizers/third-party/sentencepiece/src/sentencepiece_processor.cc:129:10: error: no declaration matches ‘uint32_t sentencepiece::ImmutableSentencePieceText_ImmutableSentencePiece::end() const’
Test RISC-V Backend / test-riscv (add, false, portable, baremetal, rv64) / run / linux-job (gh) (this job did not run on the merge base, so DrCI cannot tell whether the failure is pre-existing)
/pytorch/executorch/extension/llm/tokenizers/third-party/sentencepiece/src/sentencepiece_processor.cc:129:10: error: no declaration matches ‘uint32_t sentencepiece::ImmutableSentencePieceText_ImmutableSentencePiece::end() const’
Test RISC-V Backend / test-riscv (llama2, false, portable, baremetal, rv32) / run / linux-job (gh) (this job did not run on the merge base, so DrCI cannot tell whether the failure is pre-existing)
/pytorch/executorch/extension/llm/tokenizers/third-party/sentencepiece/src/sentencepiece_processor.cc:129:10: error: no declaration matches ‘uint32_t sentencepiece::ImmutableSentencePieceText_ImmutableSentencePiece::end() const’
Test RISC-V Backend / test-riscv (llama2, false, portable, baremetal, rv64) / run / linux-job (gh) (this job did not run on the merge base, so DrCI cannot tell whether the failure is pre-existing)
/pytorch/executorch/extension/llm/tokenizers/third-party/sentencepiece/src/sentencepiece_processor.cc:129:10: error: no declaration matches ‘uint32_t sentencepiece::ImmutableSentencePieceText_ImmutableSentencePiece::end() const’
Test RISC-V Backend / test-riscv (mobilebert, false, portable, baremetal, rv32) / run / linux-job (gh) (this job did not run on the merge base, so DrCI cannot tell whether the failure is pre-existing)
/pytorch/executorch/extension/llm/tokenizers/third-party/sentencepiece/src/sentencepiece_processor.cc:129:10: error: no declaration matches ‘uint32_t sentencepiece::ImmutableSentencePieceText_ImmutableSentencePiece::end() const’
Test RISC-V Backend / test-riscv (mobilebert, false, portable, baremetal, rv64) / run / linux-job (gh) (this job did not run on the merge base, so DrCI cannot tell whether the failure is pre-existing)
/pytorch/executorch/extension/llm/tokenizers/third-party/sentencepiece/src/sentencepiece_processor.cc:129:10: error: no declaration matches ‘uint32_t sentencepiece::ImmutableSentencePieceText_ImmutableSentencePiece::end() const’
Test RISC-V Backend / test-riscv (mv2, false, portable, baremetal, rv32) / run / linux-job (gh) (this job did not run on the merge base, so DrCI cannot tell whether the failure is pre-existing)
/pytorch/executorch/extension/llm/tokenizers/third-party/sentencepiece/src/sentencepiece_processor.cc:129:10: error: no declaration matches ‘uint32_t sentencepiece::ImmutableSentencePieceText_ImmutableSentencePiece::end() const’
Test RISC-V Backend / test-riscv (mv2, false, portable, baremetal, rv64) / run / linux-job (gh) (this job did not run on the merge base, so DrCI cannot tell whether the failure is pre-existing)
/pytorch/executorch/extension/llm/tokenizers/third-party/sentencepiece/src/sentencepiece_processor.cc:129:10: error: no declaration matches ‘uint32_t sentencepiece::ImmutableSentencePieceText_ImmutableSentencePiece::end() const’
Test RISC-V Backend / test-riscv (resnet18, false, portable, baremetal, rv32) / run / linux-job (gh) (this job did not run on the merge base, so DrCI cannot tell whether the failure is pre-existing)
/pytorch/executorch/extension/llm/tokenizers/third-party/sentencepiece/src/sentencepiece_processor.cc:129:10: error: no declaration matches ‘uint32_t sentencepiece::ImmutableSentencePieceText_ImmutableSentencePiece::end() const’
Test RISC-V Backend / test-riscv (resnet18, false, portable, baremetal, rv64) / run / linux-job (gh) (this job did not run on the merge base, so DrCI cannot tell whether the failure is pre-existing)
/pytorch/executorch/extension/llm/tokenizers/third-party/sentencepiece/src/sentencepiece_processor.cc:129:10: error: no declaration matches ‘uint32_t sentencepiece::ImmutableSentencePieceText_ImmutableSentencePiece::end() const’
Test RISC-V Backend / test-riscv (yolo26, false, portable, baremetal, rv32) / run / linux-job (gh) (this job did not run on the merge base, so DrCI cannot tell whether the failure is pre-existing)
/pytorch/executorch/extension/llm/tokenizers/third-party/sentencepiece/src/sentencepiece_processor.cc:129:10: error: no declaration matches ‘uint32_t sentencepiece::ImmutableSentencePieceText_ImmutableSentencePiece::end() const’
Test RISC-V Backend / test-riscv (yolo26, false, portable, baremetal, rv64) / run / linux-job (gh) (this job did not run on the merge base, so DrCI cannot tell whether the failure is pre-existing)
/pytorch/executorch/extension/llm/tokenizers/third-party/sentencepiece/src/sentencepiece_processor.cc:129:10: error: no declaration matches ‘uint32_t sentencepiece::ImmutableSentencePieceText_ImmutableSentencePiece::end() const’

CANCELLED JOB - The following job was cancelled. Please retry:

pull / unittest-editable / macos / macos-job (gh)
##[error]The operation was canceled.

BROKEN TRUNK - The following job failed but were present on the merge base:

👉 Rebase onto the `viable/strict` branch to avoid these failures

trunk / test-arm-backend-ethos-u (test_smaller_stories_llama) / linux-job (gh) (trunk failure)
##[error]The operation was canceled.

This comment was automatically generated by Dr. CI and updates every 15 minutes.

github-actions · 2026-06-01T16:49:53Z

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luhenry · 2026-06-01T16:50:26Z

cc @rascani @mergennachin @willChuai

Cross-compiles with riscv64-unknown-elf + picolibc, embeds the .bpte into the ELF, and runs under qemu-system-riscv{32,64} -machine virt with semihosting carrying stdout and exit status. Same bundled-IO PASS criterion as the existing linux runs.

rascani · 2026-06-01T18:14:32Z

@claude Review this PR.

claude · 2026-06-01T18:15:28Z

Claude finished @rascani's task in 2m 51s —— View job

Review: Add baremetal RISC-V smoke tests (rv32, rv64)

Gather context and read changed files
Review CI scripts and workflow files
Review baremetal source code (CMakeLists, runner, linker script, startup)
Review toolchain files and setup scripts
Review test matrix and run scripts
Post comprehensive review feedback

Overall this is a well-structured PR that cleanly extends the existing RISC-V linux testing to baremetal (rv32 + rv64) using QEMU system mode with semihosting. The architecture mirrors examples/arm/executor_runner/standalone/ which is good for consistency. A few issues to address:

Bugs

1. Stale preset path in examples/riscv/baremetal/CMakeLists.txt:49

The default EXECUTORCH_BUILD_PRESET_FILE references riscv64_baremetal.cmake but the actual file is riscv_baremetal.cmake:

set(EXECUTORCH_BUILD_PRESET_FILE
    "${EXECUTORCH_ROOT}/tools/cmake/preset/riscv64_baremetal.cmake"  # ← doesn't exist

This won't break CI (because run.sh:164 passes -DEXECUTORCH_BUILD_PRESET_FILE=...riscv_baremetal.cmake explicitly), but it will break anyone who runs cmake on the standalone project without the override. Fix this →

2. Stale path filter in .github/workflows/riscv64.yml:15

- tools/cmake/preset/riscv64_*.cmake

The preset files were renamed to riscv_linux.cmake and riscv_baremetal.cmake (no 64 in the name). This glob will never match, so changes to the preset files won't trigger CI on PRs. Should be tools/cmake/preset/riscv_*.cmake. Fix this →

3. Stale reference to setup.sh in examples/riscv/run.sh:196

echo "[run.sh] ERROR: ${qemu} not found on PATH; install with examples/riscv/setup.sh" >&2

setup.sh was renamed to setup-linux.sh in this PR. This error message will confuse users. Should say setup-linux.sh or setup-baremetal.sh depending on the ${os} variable. Fix this →

Minor Issues

4. README --arch docs are stale (examples/riscv/README.md:23)

The table shows only rv64 as the valid value for --arch, but rv32 is now supported for baremetal. The "Values" column should show rv32, rv64.

5. README link to setup.sh (examples/riscv/README.md:36)

see [setup.sh](setup.sh)

This is a broken link since the file was renamed.

Design Observations (non-blocking)

The std::random_device asm trampoline stubs (lines 92-108 of the baremetal runner) are a pragmatic solution for the linker issue, but they're tied to the GCC/libstdc++ Itanium mangling. If the toolchain upgrades and the mangled names change, this will silently fail to link. A comment noting the GCC version these names were captured from would help future debuggers. (The existing comment is good but doesn't note the version.)
The 64 MiB planned_memory_pool + 4 MiB temp_allocator_pool + 8 MiB method_allocator_pool in .bss means the ELF requires ~76 MiB minimum even for the add model. This is fine for QEMU with -m 512M but worth noting for anyone who tries to reduce the RAM allocation.
The loop termination strategy (lines 245-258) of using InvalidArgument from load_bundled_input past the last testset is clever but fragile — if InvalidArgument is returned for a different reason on testset 0, the test would silently succeed with rc = 0 (since testset_idx > 0 check wouldn't apply). The current code does handle testset 0 failure specifically (lines 250-256), so this is fine in practice.

Summary

Three bugs that should be fixed before merge (stale file references after the setup.sh → setup-linux.sh rename and riscv64_*.cmake → riscv_*.cmake rename). The architecture, linker script, semihosting implementation, and CI matrix are all solid.

rascani · 2026-06-01T20:30:25Z

Thanks for putting this together @luhenry!

sentencepiece fails to compile on GCC 15 due to missing #include <cstdint>

willChuai · 2026-06-02T06:46:27Z

@luhenry Thanks for putting this together. From the MCU / bare-metal angle we discussed in #19666, this looks like the right RV32/RV64 portable-kernel CI baseline to me.

One question: examples/riscv/test-matrix.sh says it mirrors riscv64.yml, but portable seems to get extra local coverage compared with CI: CI uses only ["v=false"], while the local matrix also runs portable with zba/zbb/zbs,v=false and one RVV variant (v=true,vlen=128). Is that intended as an extended local sweep, or should it match CI exactly?

luhenry · 2026-06-02T07:46:41Z

@luhenry Thanks for putting this together. From the MCU / bare-metal angle we discussed in #19666, this looks like the right RV32/RV64 portable-kernel CI baseline to me.

Yes, Portable Kernels is the baseline. A following contribution could be to add a rv64gc scalar and a rv64gc+RVV backend so that we can have that as a baseline for future RISC-V contributions.

One question: examples/riscv/test-matrix.sh says it mirrors riscv64.yml, but portable seems to get extra local coverage compared with CI: CI uses only ["v=false"], while the local matrix also runs portable with zba/zbb/zbs,v=false and one RVV variant (v=true,vlen=128). Is that intended as an extended local sweep, or should it match CI exactly?

examples/riscv/test-matrix.sh Is not meant to be a 1-to-1 mapping of what’s on CI but a local tool to verify most of the configurations. You’re right that we are not testing RVV on portable backend today on CI, let me add that. However, it will not be used in the sense that the code won’t be compiled with RVV enabled, except if there is run-time detection of extensions and using RVV-enabled kernels then.

luhenry · 2026-06-02T11:50:44Z

I updated test-matrix.sh and riscv64.yml to have the more complete test matrix. Here is the list of all configurations and where they are tested:

Model	Quantize	Backend	OS	Arch	Variant	riscv64.yml	test-matrix.sh
`add`	`false`	`portable`	`baremetal`	`rv32`	`rvv*`	✅	✅
				`rv32`	`scalar`	✅	✅
				`rv64`	`rvv*`	✅	✅
				`rv64`	`scalar`	✅	✅
			`linux`	`rv64`	`rvv*`	✅	✅
			`linux`	`rv64`	`scalar`	✅	✅
		`xnnpack`	`linux`	`rv64`	`rvv*`	✅	✅
		`xnnpack`	`linux`	`rv64`	`scalar`	❌	❌
	`true`	`portable`	`baremetal`	`rv32`	`rvv*`	❌	❌
				`rv32`	`scalar`	❌	❌
				`rv64`	`rvv*`	❌	❌
				`rv64`	`scalar`	❌	❌
			`linux`	`rv64`	`rvv*`	❌	❌
			`linux`	`rv64`	`scalar`	❌	❌
		`xnnpack`	`linux`	`rv64`	`rvv*`	✅	✅
		`xnnpack`	`linux`	`rv64`	`scalar`	❌	❌
`llama2`	`false`	`portable`	`baremetal`	`rv32`	`rvv*`	✅	✅
				`rv32`	`scalar`	✅	✅
				`rv64`	`rvv*`	✅	✅
				`rv64`	`scalar`	✅	✅
			`linux`	`rv64`	`rvv*`	✅	✅
			`linux`	`rv64`	`scalar`	✅	✅
		`xnnpack`	`linux`	`rv64`	`rvv*`	✅	✅
		`xnnpack`	`linux`	`rv64`	`scalar`	❌	❌
	`true`	`portable`	`baremetal`	`rv32`	`rvv*`	❌	❌
				`rv32`	`scalar`	❌	❌
				`rv64`	`rvv*`	❌	❌
				`rv64`	`scalar`	❌	❌
			`linux`	`rv64`	`rvv*`	❌	❌
			`linux`	`rv64`	`scalar`	❌	❌
		`xnnpack`	`linux`	`rv64`	`rvv*`	✅	✅
		`xnnpack`	`linux`	`rv64`	`scalar`	❌	❌
`mobilebert`	`false`	`portable`	`baremetal`	`rv32`	`rvv*`	✅	✅
				`rv32`	`scalar`	✅	✅
				`rv64`	`rvv*`	✅	✅
				`rv64`	`scalar`	✅	✅
			`linux`	`rv64`	`rvv*`	✅	✅
			`linux`	`rv64`	`scalar`	✅	✅
		`xnnpack`	`linux`	`rv64`	`rvv*`	✅	✅
		`xnnpack`	`linux`	`rv64`	`scalar`	❌	❌
	`true`	`portable`	`baremetal`	`rv32`	`rvv*`	❌	❌
				`rv32`	`scalar`	❌	❌
				`rv64`	`rvv*`	❌	❌
				`rv64`	`scalar`	❌	❌
			`linux`	`rv64`	`rvv*`	❌	❌
			`linux`	`rv64`	`scalar`	❌	❌
		`xnnpack`	`linux`	`rv64`	`rvv*`	✅	✅
		`xnnpack`	`linux`	`rv64`	`scalar`	❌	❌
`mv2`	`false`	`portable`	`baremetal`	`rv32`	`rvv*`	✅	✅
				`rv32`	`scalar`	✅	✅
				`rv64`	`rvv*`	✅	✅
				`rv64`	`scalar`	✅	✅
			`linux`	`rv64`	`rvv*`	✅	✅
			`linux`	`rv64`	`scalar`	✅	✅
		`xnnpack`	`linux`	`rv64`	`rvv*`	✅	✅
		`xnnpack`	`linux`	`rv64`	`scalar`	❌	❌
	`true`	`portable`	`baremetal`	`rv32`	`rvv*`	❌	❌
				`rv32`	`scalar`	❌	❌
				`rv64`	`rvv*`	❌	❌
				`rv64`	`scalar`	❌	❌
			`linux`	`rv64`	`rvv*`	❌	❌
			`linux`	`rv64`	`scalar`	❌	❌
		`xnnpack`	`linux`	`rv64`	`rvv*`	✅	✅
		`xnnpack`	`linux`	`rv64`	`scalar`	❌	❌
`resnet18`	`false`	`portable`	`baremetal`	`rv32`	`rvv*`	✅	✅
				`rv32`	`scalar`	✅	✅
				`rv64`	`rvv*`	✅	✅
				`rv64`	`scalar`	✅	✅
			`linux`	`rv64`	`rvv*`	✅	✅
			`linux`	`rv64`	`scalar`	✅	✅
		`xnnpack`	`linux`	`rv64`	`rvv*`	✅	✅
		`xnnpack`	`linux`	`rv64`	`scalar`	❌	❌
	`true`	`portable`	`baremetal`	`rv32`	`rvv*`	❌	❌
				`rv32`	`scalar`	❌	❌
				`rv64`	`rvv*`	❌	❌
				`rv64`	`scalar`	❌	❌
			`linux`	`rv64`	`rvv*`	❌	❌
			`linux`	`rv64`	`scalar`	❌	❌
		`xnnpack`	`linux`	`rv64`	`rvv*`	✅	✅
		`xnnpack`	`linux`	`rv64`	`scalar`	❌	❌
`yolo26`	`false`	`portable`	`baremetal`	`rv32`	`rvv*`	✅	✅
				`rv32`	`scalar`	✅	✅
				`rv64`	`rvv*`	✅	✅
				`rv64`	`scalar`	✅	✅
			`linux`	`rv64`	`rvv*`	✅	✅
			`linux`	`rv64`	`scalar`	✅	✅
		`xnnpack`	`linux`	`rv64`	`rvv*`	✅	✅
		`xnnpack`	`linux`	`rv64`	`scalar`	❌	❌
	`true`	`portable`	`baremetal`	`rv32`	`rvv*`	❌	❌
				`rv32`	`scalar`	❌	❌
				`rv64`	`rvv*`	❌	❌
				`rv64`	`scalar`	❌	❌
			`linux`	`rv64`	`rvv*`	❌	❌
			`linux`	`rv64`	`scalar`	❌	❌
		`xnnpack`	`linux`	`rv64`	`rvv*`	❌	❌
		`xnnpack`	`linux`	`rv64`	`scalar`	❌	❌

This table explicitely doesn't contain the following combinations:

linux and rv32
xnnpack and rv32
xnnpack and baremetal

luhenry · 2026-06-02T22:21:34Z

compiling sentencepiece on Ubuntu 26.04 is still tripping on GCC 15. I'll try to reproduce locally as well. To help, @rascani would you know if/how I can download the container image locally?

rascani · 2026-06-03T00:13:36Z

compiling sentencepiece on Ubuntu 26.04 is still tripping on GCC 15. I'll try to reproduce locally as well. To help, @rascani would you know if/how I can download the container image locally?

Unfortunately not, but I'm looking into it.

rascani · 2026-06-03T00:32:28Z

compiling sentencepiece on Ubuntu 26.04 is still tripping on GCC 15. I'll try to reproduce locally as well. To help, @rascani would you know if/how I can download the container image locally?

Looks they're not available externally, so the best bet is probably to build it locally.

cd .ci/docker
./build.sh executorch-ubuntu-26.04-gcc15

I can also give it a shot if you're not able to.

luhenry requested review from kirklandsign and larryliu0820 as code owners June 1, 2026 16:48

meta-cla Bot added the CLA Signed This label is managed by the Facebook bot. Authors need to sign the CLA before a PR can be reviewed. label Jun 1, 2026

This was referenced Jun 1, 2026

Add RV32 support #19531

Open

Export YOLO to executorch for RISC-V Baremetal environment #18833

Open

[RFC] First-class RISC-V support in ExecuTorch #18991

Open

[discussion] Upstreaming an HPMicro bare-metal RISC-V MCU backend #19666

Open

luhenry force-pushed the riscv-testing-baremetal branch from 7cc42fe to 00d0173 Compare June 1, 2026 16:59

nil-is-all added the module: microcontrollers For embedded MCUs like Cortex-M, or RTOS like Zephyr, does not track NPU backend like Arm Ethos. label Jun 1, 2026

luhenry added 2 commits June 1, 2026 21:39

Fix based on Claude's review

0df077d

Fix qemu-riscv64-static live check

cfd9b52

rascani approved these changes Jun 1, 2026

View reviewed changes

Use GCC 14 for host compiler as well

66edf4e

sentencepiece fails to compile on GCC 15 due to missing #include <cstdint>

luhenry added 3 commits June 2, 2026 11:21

Fix unecessary change

ba2281e

Add testing on RVV on Portable Backend

89fdf66

Add rvv128, rvv256, and rvv512 testing in test-matrix.sh

7dc53a1

Run all models with quantization (except excluded)

4b616c0

Provide feedback

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Add baremetal RISC-V smoke tests (rv32, rv64)#19917

Add baremetal RISC-V smoke tests (rv32, rv64)#19917
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🔗 Helpful Links

🧪 See artifacts and rendered test results at hud.pytorch.org/pr/pytorch/executorch/19917

❌ 1 New Failure, 1 Cancelled Job, 1 Unrelated Failure, 14 Unclassified Failures

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github-actions Bot commented Jun 1, 2026

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luhenry commented Jun 1, 2026

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rascani commented Jun 1, 2026

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Review: Add baremetal RISC-V smoke tests (rv32, rv64)

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rascani commented Jun 1, 2026

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willChuai commented Jun 2, 2026

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luhenry commented Jun 2, 2026

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4 participants

luhenry commented Jun 1, 2026 •

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pytorch-bot Bot commented Jun 1, 2026 •

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claude Bot commented Jun 1, 2026 •

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luhenry commented Jun 2, 2026 •

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