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WIP: STM32N6 HW memory encryption for XSPI devices #403
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| return EOK; | ||
| } | ||
| } |
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[clang-format-pr] reported by reviewdog 🐶
suggested fix
| } | |
cmds/memcrypt.c
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| lib_printf( | ||
| "Usage: %s d saddr eaddr -encr algo:mode -key [r|p|x]:[addr:key]\n" | ||
| "where:\n" | ||
| "\td - devide controller number (major.minor) \n" |
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[codespell] reported by reviewdog 🐶
devide ==> divide, device
cmds/memcrypt.c
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| "\talgo - used cipher: aes128, aes256, noekeon\n" | ||
| "\tmode - used mode of operation: 1, 2, ...\n" | ||
| "\tr - generate random key\n" | ||
| "\tp - use key stored in OTP memory. Requires addr - first OTP word contaning the key\n" |
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[codespell] reported by reviewdog 🐶
contaning ==> containing
hal/armv8m/stm32/n6/otp.c
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| static void otp_waitBusy(void) | ||
| { | ||
| /* Wait untill not busy */ |
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[codespell] reported by reviewdog 🐶
untill ==> until
hal/armv8m/stm32/n6/otp.c
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| u32 t; | ||
| otp_common.bsec_base = BSEC_BASE; | ||
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| /* Wait untill not busy and BSEC initialized */ |
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[codespell] reported by reviewdog 🐶
untill ==> until
devices/flash-stm32xspi/mce.c
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| } | ||
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| /* Configure and enable a memory region to be enrypted/decrypted, by MCE. |
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[codespell] reported by reviewdog 🐶
enrypted ==> encrypted
devices/flash-stm32xspi/mce.c
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| }; | ||
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| /* Lock some part of MCE configuration. Recomended to use global lock after mce regions are configured. */ |
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[codespell] reported by reviewdog 🐶
Recomended ==> Recommended
devices/flash-stm32xspi/mce.c
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| return ret; | ||
| } | ||
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| /* The RM says that MCE clocks are automatically manged by the device, but that only applies to reseting clocks. |
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[codespell] reported by reviewdog 🐶
manged ==> managed
devices/flash-stm32xspi/mce.c
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| return ret; | ||
| } | ||
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| /* The RM says that MCE clocks are automatically manged by the device, but that only applies to reseting clocks. |
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[codespell] reported by reviewdog 🐶
reseting ==> resetting
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| #include "../types.h" | ||
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| #ifndef EIO | ||
| #define EIO 5 |
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[clang-format-pr] reported by reviewdog 🐶
suggested fix
| #define EIO 5 | |
| #define EIO 5 |
Enable otp command for STM32N6 in Makefile. JIRA: RTOS-1068
Introduce new plo device class for encrypted storage. Add new XSPI controllers that support encryption via MCE. Add memcrypt command for STM32N6 to configure encrypted regions. Add rng driver to hal/stm32/n6. JIRA: RTOS-1084
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Add MCE encryption to XSPI external memories.
Description
Introduce new plo device class for encrypted storage.
Add new XSPI controllers that support encryption via MCE.
Add memcrypt command for STM32N6 to configure encrypted regions.
Add RNG driver to hal/stm32/n6.
Add OTP driver to hal/stm32/n6.
Motivation and Context
Memory encryption is required for secureboot (JIRA: RTOS-1084)
Types of changes
How Has This Been Tested?
Checklist:
Special treatment
These changes were tested, but it would be good to test memcrypt even more.
Potential clean up/refactor in devices/flash-stm32xspi.