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Apple M6 (T8152) Mac mini base: PMGR, USB2, DART, NVMe, board fragments - #191
joshuaswarren wants to merge 10 commits into
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Compile receipt (arm64, clang,
Not run: a link of the whole kernel, a boot, Notes for the reviewer:
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Review at 3d03eb3: findings, no GREEN yet. Read from the diff: sart, pinctrl, nvme, hub, pmgr-psd, usb2-t8152, apple-dart and dwc3-apple in full for the added lines; the dts files and the binding files only by grep and file list. Not built, not booted, Must fix or answer (a defect in what this PR ships):
Behaviour changes for other SoCs hidden in M6 commits (say so in the commit text, or split): Please confirm (I did not verify): Smaller: Checked and fine: pmgr-psd.c (slot request, VALID before STATUS, genpd parent order, error unwinding, sleepable power_on documented against the irq-safe DART); sart4 register accessors; pinctrl compatible line; |
 [Medium impact] The PR appears safe to merge based on the reviewed code; no blocking issue remains. SummaryAdds the base T8152 support for storage, power domains, GPIO, DART, and fixed-role USB2 on the M6 Mac mini.
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Review at e27454a: findings (not GREEN) Second review at this head, on top of the review and the bot findings above. The fixes listed in the last owner comment are in the diff and read correctly (items 1 to 9 there): the PMP DART path and Checked at this head
Defects still in the diff (read from the head, not booted)
Not checkedNo compile at this head (I built the previous head, which matched its receipt), no boot, no |
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Review at e27454a: findings (read only; nothing built or booted by me, no dt_binding_check or dtbs_check run). Checked and fine:
Findings:
Not checked: the remaining files of the PR ( |
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Review at c9d88a5: findings (not GREEN) Third pass, on the force-pushed head. I compared the old and new diff, ran the schema checks by hand, and re-checked each item of my earlier comment. A correction of my ownMy comment on the previous head said the NVMe conditionals "read correctly". That was wrong: the binding put Fixed since the previous head (checked)
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The T8152 GPIO block has the same layout as the T8140 one. Match "apple,t8152-pinctrl" with the T8140 hardware data. Signed-off-by: Joshua Warren <816217+joshuaswarren@users.noreply.github.com>
T8152 has a SART with a new register layout: the per-entry config, physical address and size registers sit at 0x00, 0x60 and 0xc0. Add the operations for it and match "apple,t8152-sart". The binding lists the new compatible as a stand-alone entry. Measured on an M6 Mac mini with an earlier form of this change: the machine boots and runs its root file system from NVMe, which uses this SART. This version is compile-checked only. Signed-off-by: Joshua Warren <816217+joshuaswarren@users.noreply.github.com>
On T8152 the queue setup registers (admin queue, IO queues, the linear submission queue control) live at different offsets, and a few of them accept writes but read back zero. Add a register translation for that layout, skip the read-back checks that cannot work, and describe the controller with a new hardware data block matched by "apple,t8152-nvme-ans2". The ANS is a virtual PMGR device on this SoC and has no reset line, so the hardware data block carries a no_reset_control flag. Only T8152 skips the reset lookup. Every other SoC still requires a reset control and fails the probe without one, as before. The binding gets the new compatible. On T8152 the resets, power-domains and power-domain-names properties are not required, and the controller has two register regions (the NVMMU registers live in the first one). Measured on an M6 Mac mini with an earlier form of this change: the machine boots and runs its root file system from NVMe. This version is compile-checked only. Signed-off-by: Joshua Warren <816217+joshuaswarren@users.noreply.github.com>
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GREEN at c9d88a5. Read only: nothing built or booted by me, no
Not checked: the files of this PR other than the ones above, and any behaviour on hardware. |
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GREEN at 9af1827. Read only: nothing built or booted by me, and I did not rerun
The usb2-phy binding's |
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GREEN at 9af1827 Fourth pass, on the force-pushed head. I compared this PR diff with the one I reviewed at Findings of my earlier comments, checked at this head
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Summary for a maintainer, at head
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GREEN at b8943e8 Read: the ten commits of this head against the ten I reviewed at 9af1827, compared per commit as diffs with the hash lines removed. Six commits are identical (pinctrl, SART, NVMe, USB2 PHY, hub quirk, peripherals dts). The four that changed:
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On T8152 the ATC USB blocks (and the GPU) are behind a per-slot service request in the power state director, on top of the normal PMGR power states. Expose each slot, or a group of slots that must come up together, as a generic power domain. Power-on writes the slot request and waits for the acknowledge; power-off requests state 6 in reverse order. Add the devicetree binding. When a power-on request times out, the slot that timed out is put back to idle with the slots before it, because its acknowledge was not seen but it may still start. When a group power-off fails, every slot is put back to its active state, including a slot whose off request timed out and may still finish stopping, because genpd keeps the domain marked on after a failed power-off and would skip power_on at the next resume. Signed-off-by: Joshua Warren <816217+joshuaswarren@users.noreply.github.com>
The fixed host ports on T8152 need only the USB2 part of the PHY. Add a driver that applies the bootloader-supplied calibration, handles host and device mode, and leaves the USB3 and USB4 lanes alone. Add the devicetree binding. Signed-off-by: Joshua Warren <816217+joshuaswarren@users.noreply.github.com>
A hub with the Apple ID 05ac:800f sits behind the front ports of the M6 Mac mini. Add that ID to the hub quirk table with HUB_QUIRK_DISABLE_AUTOSUSPEND so the kernel keeps it powered. The match is on the vendor and product ID alone. Every hub with this ID loses autosuspend, not only the one on this machine. The constant is named after the ID, USB_PRODUCT_APPLE_HUB_800F, because the ID is Apple's and the part behind it was not identified from the descriptor. This quirk was not measured on its own: it only keeps the hub awake. Signed-off-by: Joshua Warren <816217+joshuaswarren@users.noreply.github.com>
Add a peripherals fragment to the M6 Mac mini board file: the always-on GPIO controller with the reset hog for the front-port USB hub, and the four PSD service slots for the USB ports. The NVMe controller, its mailbox and its address filter are not described here. The NVMe node needs a mailbox driver change that is not in this tree yet. The fragment holds only addresses, interrupt numbers and wiring. The boot loader adds the register tunables that some blocks need. The PMGR power domains are not described yet, so nodes that need them are left out. Signed-off-by: Joshua Warren <816217+joshuaswarren@users.noreply.github.com>
Add the DART of the Apple M6 (T8152), a third-generation DART whose topology is fixed by the hardware. Its streams are described by static parameters instead of being probed, and it takes no MMIO access until the first use, because the block can be power gated behind the ATC USB domains. The binding requires a second register region (the TLB invalidate doorbell) for the T8152 compatible only. The change adds: - the apple,t8152-dart compatible and its hardware description; - static topology and "first use" initialisation of every DART; - the Gen3 TLB invalidate and the fault handler; - the reset path for DARTs that the boot loader leaves locked. A DART that the boot loader leaves locked is held powered for its lifetime. That applies to Gen3 hardware only. The other generations keep their behaviour. The first-use initialisation re-reads the parameters and fails if the page size differs from the one assumed at probe. It runs under a spinlock, and every function it calls is non-sleeping (register accesses and an atomic poll). Measured on an M6 Mac mini with the earlier form of this change: the display controller DART attaches locked on every boot. This version is rebased on current integration/aurora and was compile-checked only. The USB DART paths need the T8152 PSD power domains and were not run on their own. The doorbell store and the TLBI of the Gen3 invalidate are arm64 instructions: they are built only with CONFIG_ARM64, and other architectures (COMPILE_TEST) get a stub that returns -EOPNOTSUPP. A locked Gen3 DART no longer takes the range flush through TLB_CMD, which Gen3 does not accept; it uses the full-stream Gen3 callback. Gen3 does not take commands through TLB_CMD, so the unlock after a lock-on-error exception is not sent there: the DART logs once that this is not supported. The stale-exception drain of a reset does not read 0x704 on Gen3, like the fault handler. Signed-off-by: Joshua Warren <816217+joshuaswarren@users.noreply.github.com>
Add the apple,t8152-dwc3 compatible to the Apple dwc3 glue. The ATC ports of the M6 (T8152) controller never switch roles through the Type-C controller. The glue starts the controller as a fixed host, with or without a hub child, or as a fixed peripheral when the node sets dr_mode = "peripheral". The T8152 profile is USB2 only: it needs maximum-speed = "high-speed", takes no reset line, and its USB3 PHY is optional. The calibration lists come from the device tree (apple,tunable-* properties that the boot loader fills in at runtime; the binding does not require them in the board file) and are applied to the register windows in a fixed order after the core is reset. The pipe handler is set up for the selected role. The apple,t8103-dwc3 paths keep their behaviour. The controller stays a syscore device while it runs, as before: no separate suspend or resume path is added for T8152. The earlier form of this change ran on an M6 Mac mini USB2 front port. This version is rebased on current integration/aurora and was compile-checked only. SuperSpeed does not train yet and is not part of this change. A fixed peripheral does not require the host-only calibration lists at probe, since it never applies them. The binding lists exactly four iommus entries, two stream IDs on each of two DARTs. If the T8152 USB2 PHY fails to initialise or power on during core start, the failure goes through the same shutdown as a failed core init, so the reset and syscore flags set earlier are cleared again. Signed-off-by: Joshua Warren <816217+joshuaswarren@users.noreply.github.com>
Describe the power management blocks and the USB controllers of the Mac mini (M6, J873) next to the peripherals fragment: - the two PMGR blocks and their power domains, in t8152-j873-pmgr.dtsi; - for each of the four USB ports (usb0, usb1, usb2 and usb3 of the SoC): two DART instances, the USB2 PHY and the dwc3 controller. The register windows, interrupts and DART tunables are the values of the Apple device tree of the machine. The boot loader adds the apple,tunable-* lists of the USB2 PHY and the controller at runtime. The bindings list the apple,t8152-pmgr and apple,t8152-pmgr-pwrstate compatibles, and the dwc3 and USB2 PHY bindings take the tunable lists as optional, because the boot loader adds them. The fragment is a plain description of the hardware. The ports that the change describes run USB2 only: SuperSpeed and USB4 are not part of it. This commit compiles to a device tree blob with dtc without warnings. It was not booted. The bring-up it comes from enumerated the front-port USB2 hub and a USB disk at 480 Mb/s. The four PSD service slots get their PMGR domains (the aon and the port domain of their port) as parents, so genpd powers them before the slot request. Signed-off-by: Joshua Warren <816217+joshuaswarren@users.noreply.github.com>
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GREEN at 3c57b1d Compared the ten commits with the ones I cleared at Checked
Not checkedCompile, checkpatch and hardware behavior (the receipts in the head note are the author's); the PSD parent choice for ATC3 is a stated guess in the stacked PR. Merge still needs CI and the owner's word. |
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GREEN at 9fbb356 Read: the ten commits of this head against the ones I reviewed at b8943e8, compared per commit as diffs with the hash lines removed. Eight commits are identical (pinctrl, SART, NVMe, USB2 PHY, hub quirk, peripherals dts, dwc3, PMGR/USB dts). Two changed:
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GREEN at 9fbb356 Compared with my GREEN at
The device tree and binding commits did not change, so the |
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Status at head |
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Note 🤖 GPT-6.1 Terra responding on behalf of joshuaswarren The series starts with #191 (NVMe, USB2, power domains and DART). After that, #192 adds the Type-C PHY, #193 adds QSPI, #194 adds audio plumbing, and #197 adds the USB4 host. #198 builds on #197 for PCIe tunneling; #201 builds on the audio plumbing and needs the #197 mailbox binding. The PRs record compile and device-tree checks. Earlier forms booted from NVMe and exercised USB2; separate earlier builds exercised QSPI, the USB4 host and a PCIe tunnel. Those results are not boots of the current PR heads. What would help you review the series: smaller patches, a different order, or specific test results? |
Summary
The first ten commits that run Linux on the Apple M6 (T8152) Mac mini (J873): the bits every later M6 change needs.
integration/aurorahas the board filet8152-j873g.dtswith a RAM-only boot and nothing else for this SoC. This series adds the drivers and nodes that the next M6 changes (USB4, PCIe, display, audio, Wi-Fi) build on.It is not needed for the release candidate, and there is no rush to review or merge it.
Layers (in commit order)
psd_atc0..3_usb)t8152-j873g.dtsps_atc*domains and the four USB controllers' DARTs, PHYs and dwc3 nodesCommits 1-7 are the series reviewed by hash earlier. Commits 8-10 are the same M6 bring-up code, rebased on current
integration/auroraby hand (conflicts inapple-dart.canddwc3-apple.c).What was measured
On an M6 Mac mini, with the earlier forms of these changes:
What was not measured
integration/aurora, was not booted. It was compile-checked: an arm64 clang build withW=1of the eight touched objects (pinctrl-apple-gpio,sart, nvmeapple,pmgr-psd,usb2-t8152, usb corehub,apple-dart,dwc3-apple) and oft8152-j873g.dtbgave return code 0 and 0 warnings on every target. The board file also compiles with plaindtc.check-commits: Signed-off-by on all 10 commits; no checkpatch errors (warnings: long lines, the MAINTAINERS notice).dt-validate(dtschema 2026.9, run by hand with the schemas of this tree) with 0 messages; the 72 binding examples print one message, indisplay/apple,dcp-typec-routes.yaml, which this PR does not touch. The kernel's ownmake dtbs_check/dt_binding_checkwere not run.Follow-ups that depend on this series
USB4/Thunderbolt host router, PCIe ports, the ATC Type-C PHY, display, audio and Wi-Fi each come as their own change on top. Pieces that are not here on purpose: the SPMI generation 4 controller and the Type-C port controllers behind it, the SMC changes, and the CIO reset driver.