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Merge pull request alibaba#227 from cutworthwang/master
add cypress PSoC6 support
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/* | ||
* Copyright (C) 2015-2017 Alibaba Group Holding Limited | ||
*/ | ||
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#ifndef _ATCMD_CONFIG_PLATFORM_H_ | ||
#define _ATCMD_CONFIG_PLATFORM_H_ | ||
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// AT uart | ||
#define AT_UART_PORT 1 | ||
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#endif |
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#include "hal/soc/soc.h" | ||
#include <aos/kernel.h> | ||
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/* Logic partition on flash devices */ | ||
hal_logic_partition_t hal_partitions[HAL_PARTITION_MAX]; | ||
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void board_init(void) | ||
{ | ||
hal_partitions[HAL_PARTITION_BOOTLOADER].partition_owner = HAL_FLASH_EMBEDDED; | ||
hal_partitions[HAL_PARTITION_BOOTLOADER].partition_description = "Bootloader"; | ||
hal_partitions[HAL_PARTITION_BOOTLOADER].partition_start_addr = 0x1000A000; | ||
hal_partitions[HAL_PARTITION_BOOTLOADER].partition_length = 0xA000; //40k bytes | ||
hal_partitions[HAL_PARTITION_BOOTLOADER].partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN; | ||
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hal_partitions[HAL_PARTITION_APPLICATION].partition_owner = HAL_FLASH_EMBEDDED; | ||
hal_partitions[HAL_PARTITION_APPLICATION].partition_description = "Application"; | ||
hal_partitions[HAL_PARTITION_APPLICATION].partition_start_addr = 0x10014000; | ||
hal_partitions[HAL_PARTITION_APPLICATION].partition_length = 0x74000; //464k bytes | ||
hal_partitions[HAL_PARTITION_APPLICATION].partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN; | ||
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hal_partitions[HAL_PARTITION_PARAMETER_1].partition_owner = HAL_FLASH_EMBEDDED; | ||
hal_partitions[HAL_PARTITION_PARAMETER_1].partition_description = "PARAMETER1"; | ||
hal_partitions[HAL_PARTITION_PARAMETER_1].partition_start_addr = 0x10088000; | ||
hal_partitions[HAL_PARTITION_PARAMETER_1].partition_length = 0x1000; // 4k bytes | ||
hal_partitions[HAL_PARTITION_PARAMETER_1].partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN; | ||
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hal_partitions[HAL_PARTITION_PARAMETER_2].partition_owner = HAL_FLASH_EMBEDDED; | ||
hal_partitions[HAL_PARTITION_PARAMETER_2].partition_description = "PARAMETER2"; | ||
hal_partitions[HAL_PARTITION_PARAMETER_2].partition_start_addr = 0x10089000; | ||
hal_partitions[HAL_PARTITION_PARAMETER_2].partition_length = 0x1000; //4k bytes | ||
hal_partitions[HAL_PARTITION_PARAMETER_2].partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN; | ||
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hal_partitions[HAL_PARTITION_OTA_TEMP].partition_owner = HAL_FLASH_EMBEDDED; | ||
hal_partitions[HAL_PARTITION_OTA_TEMP].partition_description = "OTA Storage"; | ||
hal_partitions[HAL_PARTITION_OTA_TEMP].partition_start_addr = 0x1008A000; | ||
hal_partitions[HAL_PARTITION_OTA_TEMP].partition_length = 0x74000; //464k bytes | ||
hal_partitions[HAL_PARTITION_OTA_TEMP].partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN; | ||
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hal_partitions[HAL_PARTITION_PARAMETER_3].partition_owner = HAL_FLASH_EMBEDDED; | ||
hal_partitions[HAL_PARTITION_PARAMETER_3].partition_description = "PARAMETER3"; | ||
hal_partitions[HAL_PARTITION_PARAMETER_3].partition_start_addr = 0x100FE000; | ||
hal_partitions[HAL_PARTITION_PARAMETER_3].partition_length = 0x1000; //4k bytes | ||
hal_partitions[HAL_PARTITION_PARAMETER_3].partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN; | ||
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hal_partitions[HAL_PARTITION_PARAMETER_4].partition_owner = HAL_FLASH_EMBEDDED; | ||
hal_partitions[HAL_PARTITION_PARAMETER_4].partition_description = "PARAMETER4"; | ||
hal_partitions[HAL_PARTITION_PARAMETER_4].partition_start_addr = 0x100FF000; | ||
hal_partitions[HAL_PARTITION_PARAMETER_4].partition_length = 0x1000; //4k bytes | ||
hal_partitions[HAL_PARTITION_PARAMETER_4].partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN; | ||
} |
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#define HARDWARE_REVISION "V1.0" | ||
#define MODEL "PSOC6" | ||
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#ifdef BOOTLOADER | ||
#define STDIO_UART 5 | ||
#define STDIO_UART_BAUDRATE 115200 | ||
#else | ||
#define STDIO_UART 5 | ||
#define STDIO_UART_BAUDRATE 115200 | ||
#endif |
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NAME := board_cy8ckit-062 | ||
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JTAG := jlink | ||
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$(NAME)_TYPE := kernel | ||
MODULE := 1062 | ||
HOST_ARCH := Cortex-M4 | ||
HOST_MCU_FAMILY := cy8c6347 | ||
SUPPORT_BINS := no | ||
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$(NAME)_SOURCES := board.c | ||
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GLOBAL_INCLUDES += . | ||
GLOBAL_DEFINES += RHINO_CONFIG_TICK_TASK=0 | ||
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sal ?= 1 | ||
ifeq (1,$(sal)) | ||
$(NAME)_COMPONENTS += sal | ||
module ?= wifi.mk3060 | ||
else | ||
GLOBAL_DEFINES += CONFIG_NO_TCPIP | ||
endif | ||
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CONFIG_SYSINFO_PRODUCT_MODEL := ALI_AOS_CY8C6347BZI | ||
CONFIG_SYSINFO_DEVICE_NAME := CY8C6347BZI | ||
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GLOBAL_CFLAGS += -DSYSINFO_OS_VERSION=\"$(CONFIG_SYSINFO_OS_VERSION)\" | ||
GLOBAL_CFLAGS += -DSYSINFO_PRODUCT_MODEL=\"$(CONFIG_SYSINFO_PRODUCT_MODEL)\" | ||
GLOBAL_CFLAGS += -DSYSINFO_DEVICE_NAME=\"$(CONFIG_SYSINFO_DEVICE_NAME)\" | ||
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ifeq ($(COMPILER),armcc) | ||
else ifeq ($(COMPILER),iar) | ||
else | ||
GLOBAL_LDFLAGS += -L $(SOURCE_ROOT)/board/cy8ckit-062 | ||
endif | ||
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# Global defines | ||
# HSE_VALUE = STM32 crystal frequency = 26MHz (needed to make UART work correctly) | ||
GLOBAL_DEFINES += $$(if $$(NO_CRLF_STDIO_REPLACEMENT),,CRLF_STDIO_REPLACEMENT) | ||
GLOBAL_CFLAGS += -DSTM32L475xx | ||
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WIFI_FIRMWARE_SECTOR_START := 2 #0x2000 | ||
FILESYSTEM_IMAGE_SECTOR_START := 256 #0x100000 | ||
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# Extra build target in mico_standard_targets.mk, include bootloader, and copy output file to eclipse debug file (copy_output_for_eclipse) | ||
EXTRA_TARGET_MAKEFILES += $(MAKEFILES_PATH)/aos_standard_targets.mk | ||
#EXTRA_TARGET_MAKEFILES += $(SOURCE_ROOT)/platform/mcu/$(HOST_MCU_FAMILY)/gen_crc_bin.mk | ||
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# Define default component testcase set | ||
ifeq (, $(findstring yts, $(BUILD_STRING))) | ||
GLOBAL_DEFINES += RHINO_CONFIG_WORKQUEUE=1 | ||
TEST_COMPONENTS += basic api wifi_hal rhino vcall kv yloop alicrypto cjson digest_algorithm hashtable | ||
else | ||
GLOBAL_DEFINES += RHINO_CONFIG_WORKQUEUE=0 | ||
endif |
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/* | ||
* Copyright (C) 2015-2017 Alibaba Group Holding Limited | ||
*/ | ||
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#ifndef CONFIG_H | ||
#define CONFIG_H | ||
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/* chip level conf */ | ||
#ifndef RHINO_CONFIG_LITTLE_ENDIAN | ||
#define RHINO_CONFIG_LITTLE_ENDIAN 1 | ||
#endif | ||
#ifndef RHINO_CONFIG_CPU_STACK_DOWN | ||
#define RHINO_CONFIG_CPU_STACK_DOWN 1 | ||
#endif | ||
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/* kernel feature conf */ | ||
#ifndef RHINO_CONFIG_SEM | ||
#define RHINO_CONFIG_SEM 1 | ||
#endif | ||
#ifndef RHINO_CONFIG_QUEUE | ||
#define RHINO_CONFIG_QUEUE 1 | ||
#endif | ||
#ifndef RHINO_CONFIG_TASK_SEM | ||
#define RHINO_CONFIG_TASK_SEM 1 | ||
#endif | ||
#ifndef RHINO_CONFIG_EVENT_FLAG | ||
#define RHINO_CONFIG_EVENT_FLAG 1 | ||
#endif | ||
#ifndef RHINO_CONFIG_TIMER | ||
#define RHINO_CONFIG_TIMER 1 | ||
#endif | ||
#ifndef RHINO_CONFIG_BUF_QUEUE | ||
#define RHINO_CONFIG_BUF_QUEUE 1 | ||
#endif | ||
#ifndef RHINO_CONFIG_MM_BLK | ||
#define RHINO_CONFIG_MM_BLK 1 | ||
#endif | ||
#ifndef RHINO_CONFIG_MM_DEBUG | ||
#define RHINO_CONFIG_MM_DEBUG 1 | ||
#endif | ||
#ifndef RHINO_CONFIG_MM_TLF | ||
#define RHINO_CONFIG_MM_TLF 1 | ||
#endif | ||
#ifndef RHINO_CONFIG_MM_TLF_BLK_SIZE | ||
#define RHINO_CONFIG_MM_TLF_BLK_SIZE 8192 | ||
#endif | ||
#define K_MM_STATISTIC 1 | ||
#ifndef RHINO_CONFIG_MM_MAXMSIZEBIT | ||
#define RHINO_CONFIG_MM_MAXMSIZEBIT 19 | ||
#endif | ||
#ifndef RHINO_CONFIG_GCC_RETADDR | ||
#define RHINO_CONFIG_GCC_RETADDR 1 | ||
#endif | ||
#ifndef RHINO_CONFIG_MM_LEAKCHECK | ||
#define RHINO_CONFIG_MM_LEAKCHECK 0 | ||
#endif | ||
#ifndef RHINO_CONFIG_RINGBUF_VENDOR | ||
#define RHINO_CONFIG_RINGBUF_VENDOR 0 | ||
#endif | ||
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#ifndef RHINO_CONFIG_KOBJ_SET | ||
#define RHINO_CONFIG_KOBJ_SET 1 | ||
#endif | ||
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/* kernel task conf */ | ||
#ifndef RHINO_CONFIG_TASK_SUSPEND | ||
#define RHINO_CONFIG_TASK_SUSPEND 1 | ||
#endif | ||
#ifndef RHINO_CONFIG_TASK_INFO | ||
#define RHINO_CONFIG_TASK_INFO 1 | ||
#endif | ||
#ifndef RHINO_CONFIG_TASK_DEL | ||
#define RHINO_CONFIG_TASK_DEL 1 | ||
#endif | ||
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#ifndef RHINO_CONFIG_TASK_STACK_CUR_CHECK | ||
#define RHINO_CONFIG_TASK_STACK_CUR_CHECK 1 | ||
#endif | ||
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#ifndef RHINO_CONFIG_TASK_WAIT_ABORT | ||
#define RHINO_CONFIG_TASK_WAIT_ABORT 1 | ||
#endif | ||
#ifndef RHINO_CONFIG_TASK_STACK_OVF_CHECK | ||
#define RHINO_CONFIG_TASK_STACK_OVF_CHECK 1 | ||
#endif | ||
#ifndef RHINO_CONFIG_SCHED_RR | ||
#define RHINO_CONFIG_SCHED_RR 1 | ||
#endif | ||
#ifndef RHINO_CONFIG_TIME_SLICE_DEFAULT | ||
#define RHINO_CONFIG_TIME_SLICE_DEFAULT 50 | ||
#endif | ||
#ifndef RHINO_CONFIG_PRI_MAX | ||
#define RHINO_CONFIG_PRI_MAX 62 | ||
#endif | ||
#ifndef RHINO_CONFIG_USER_PRI_MAX | ||
#define RHINO_CONFIG_USER_PRI_MAX (RHINO_CONFIG_PRI_MAX - 2) | ||
#endif | ||
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/* kernel workqueue conf */ | ||
#ifndef RHINO_CONFIG_WORKQUEUE | ||
#define RHINO_CONFIG_WORKQUEUE 1 | ||
#endif | ||
#ifndef RHINO_CONFIG_WORKQUEUE_STACK_SIZE | ||
#define RHINO_CONFIG_WORKQUEUE_STACK_SIZE 768 | ||
#endif | ||
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/* kernel mm_region conf */ | ||
#ifndef RHINO_CONFIG_MM_REGION_MUTEX | ||
#define RHINO_CONFIG_MM_REGION_MUTEX 0 | ||
#endif | ||
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/* kernel timer&tick conf */ | ||
#ifndef RHINO_CONFIG_HW_COUNT | ||
#define RHINO_CONFIG_HW_COUNT 0 | ||
#endif | ||
#ifndef RHINO_CONFIG_TICK_TASK | ||
#define RHINO_CONFIG_TICK_TASK 0 | ||
#endif | ||
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#if (RHINO_CONFIG_TICK_TASK > 0) | ||
#ifndef RHINO_CONFIG_TICK_TASK_STACK_SIZE | ||
#define RHINO_CONFIG_TICK_TASK_STACK_SIZE 256 | ||
#endif | ||
#ifndef RHINO_CONFIG_TICK_TASK_PRI | ||
#define RHINO_CONFIG_TICK_TASK_PRI 1 | ||
#endif | ||
#endif | ||
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#ifndef RHINO_CONFIG_TICKLESS | ||
#define RHINO_CONFIG_TICKLESS 0 | ||
#endif | ||
#ifndef RHINO_CONFIG_TICKS_PER_SECOND | ||
#define RHINO_CONFIG_TICKS_PER_SECOND 100 | ||
#endif | ||
/* must be 2^n size!, such as 1, 2, 4, 8, 16,32, etc....... */ | ||
#ifndef RHINO_CONFIG_TICK_HEAD_ARRAY | ||
#define RHINO_CONFIG_TICK_HEAD_ARRAY 8 | ||
#endif | ||
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/*must reserve enough stack size for timer cb will consume*/ | ||
#ifndef RHINO_CONFIG_TIMER_TASK_STACK_SIZE | ||
#define RHINO_CONFIG_TIMER_TASK_STACK_SIZE 300 | ||
#endif | ||
#ifndef RHINO_CONFIG_TIMER_RATE | ||
#define RHINO_CONFIG_TIMER_RATE 1 | ||
#endif | ||
#ifndef RHINO_CONFIG_TIMER_TASK_PRI | ||
#define RHINO_CONFIG_TIMER_TASK_PRI 5 | ||
#endif | ||
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/* kernel intrpt conf */ | ||
#ifndef RHINO_CONFIG_INTRPT_STACK_REMAIN_GET | ||
#define RHINO_CONFIG_INTRPT_STACK_REMAIN_GET 0 | ||
#endif | ||
#ifndef RHINO_CONFIG_INTRPT_STACK_OVF_CHECK | ||
#define RHINO_CONFIG_INTRPT_STACK_OVF_CHECK 0 | ||
#endif | ||
#ifndef RHINO_CONFIG_INTRPT_MAX_NESTED_LEVEL | ||
#define RHINO_CONFIG_INTRPT_MAX_NESTED_LEVEL 188u | ||
#endif | ||
#ifndef RHINO_CONFIG_INTRPT_GUARD | ||
#define RHINO_CONFIG_INTRPT_GUARD 0 | ||
#endif | ||
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/* kernel dyn alloc conf */ | ||
#ifndef RHINO_CONFIG_KOBJ_DYN_ALLOC | ||
#define RHINO_CONFIG_KOBJ_DYN_ALLOC 1 | ||
#endif | ||
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#if (RHINO_CONFIG_KOBJ_DYN_ALLOC > 0) | ||
#ifndef RHINO_CONFIG_K_DYN_QUEUE_MSG | ||
#define RHINO_CONFIG_K_DYN_QUEUE_MSG 30 | ||
#endif | ||
#ifndef RHINO_CONFIG_K_DYN_TASK_STACK | ||
#define RHINO_CONFIG_K_DYN_TASK_STACK 256 | ||
#endif | ||
#ifndef RHINO_CONFIG_K_DYN_MEM_TASK_PRI | ||
#define RHINO_CONFIG_K_DYN_MEM_TASK_PRI 6 | ||
#endif | ||
#endif | ||
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/* kernel idle conf */ | ||
#ifndef RHINO_CONFIG_IDLE_TASK_STACK_SIZE | ||
#define RHINO_CONFIG_IDLE_TASK_STACK_SIZE 200 | ||
#endif | ||
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/* kernel hook conf */ | ||
#ifndef RHINO_CONFIG_USER_HOOK | ||
#define RHINO_CONFIG_USER_HOOK 0 | ||
#endif | ||
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/* kernel stats conf */ | ||
#ifndef RHINO_CONFIG_SYSTEM_STATS | ||
#define RHINO_CONFIG_SYSTEM_STATS 1 | ||
#endif | ||
#ifndef RHINO_CONFIG_DISABLE_SCHED_STATS | ||
#define RHINO_CONFIG_DISABLE_SCHED_STATS 0 | ||
#endif | ||
#ifndef RHINO_CONFIG_DISABLE_INTRPT_STATS | ||
#define RHINO_CONFIG_DISABLE_INTRPT_STATS 0 | ||
#endif | ||
#ifndef RHINO_CONFIG_CPU_USAGE_STATS | ||
#define RHINO_CONFIG_CPU_USAGE_STATS 0 | ||
#endif | ||
#ifndef RHINO_CONFIG_CPU_USAGE_TASK_PRI | ||
#define RHINO_CONFIG_CPU_USAGE_TASK_PRI (RHINO_CONFIG_PRI_MAX - 2) | ||
#endif | ||
#ifndef RHINO_CONFIG_TASK_SCHED_STATS | ||
#define RHINO_CONFIG_TASK_SCHED_STATS 0 | ||
#endif | ||
#ifndef RHINO_CONFIG_CPU_USAGE_TASK_STACK | ||
#define RHINO_CONFIG_CPU_USAGE_TASK_STACK 256 | ||
#endif | ||
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#ifndef RHINO_CONFIG_CPU_NUM | ||
#define RHINO_CONFIG_CPU_NUM 1 | ||
#endif | ||
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/* kernel trace conf */ | ||
#ifndef RHINO_CONFIG_TRACE | ||
#define RHINO_CONFIG_TRACE 0 | ||
#endif | ||
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#endif /* CONFIG_H */ | ||
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