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Merge pull request #2904 from o1-labs/dw/rem-by-zero
o1vm/riscv32im: rem and remu by zero
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,19 @@ | ||
.section .text | ||
.globl _start | ||
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||
_start: | ||
# Signed remainder by zero (rem) | ||
li t0, 42 # t0 = 42 | ||
li t1, 0 # t1 = 0 | ||
rem t2, t0, t1 # t2 = t0 % t1 (Expected: remainder by zero) | ||
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||
# Custom exit syscall | ||
li a0, 0 | ||
li a1, 0 | ||
li a2, 0 | ||
li a3, 0 | ||
li a4, 0 | ||
li a5, 0 | ||
li a6, 0 | ||
li a7, 42 | ||
ecall |
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,19 @@ | ||
.section .text | ||
.globl _start | ||
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||
_start: | ||
# Unsigned remainder by zero (remu) | ||
li t0, 42 # t0 = 42 | ||
li t1, 0 # t1 = 0 | ||
remu t2, t0, t1 # t2 = t0 % t1 (Expected: remainder by zero) | ||
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||
# Custom exit syscall | ||
li a0, 0 | ||
li a1, 0 | ||
li a2, 0 | ||
li a3, 0 | ||
li a4, 0 | ||
li a5, 0 | ||
li a6, 0 | ||
li a7, 42 | ||
ecall |
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