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Package Items

In your development kit there should be 2 items, a VSX accelerator card and its service card.


System Requirements

Operating System: Any linux distribution ideally Ubuntu or CentOS. Development done on Ubuntu Memory: 10 GB/card installed allocatable for caching or RAM drive for optimal loading experience Motherboard: any board with 4x PCIe 3.0 slot or larger NOTE: All development is done on the following machine: Operating System: Server: Supermicro 4028GR-TR2 CPU: 2x Intel Xenon Memory:

Connecting the VSX

Host

The card requires external power in addition to being plugged into a PCIe slot. The card doesn’t use more power than the 70 W limit through the PCIe connector but power through the PCIe connector J2 has been disabled. To power the card a modification must be done to a standard PCIe 8 Pin connector. The bridge between pins 7 and 8 must be removed and the bottom corners of pin 4 must be chamfered.


Mistakenly an EPS-12V CPU connector was used on the card but the connector is wired up as a PCIe 8-pin connector. See pg 68 of the schematic and the illustration above to understand the reason for modification. It is also strongly recommended to install the VSX accelerator in a horizontal case so the card is “standing” parallel to the force of gravity as seen in the illustration below. If a traditional vertical tower case is your only option it is strongly recommended to support the card out under the power connector J1.


Due to the relative low layer count and high number of high pin count BGA devices the card is sensitive to warping. Leaving the card cantilevered will likely result in damage.

Service Card

The service card has 5 functions, ECP5 JTAG (J3-5), Artix 7 JTAG (J1,2), Back Side Bus (BSB) 4x connector (J6-9,11-14,18-25) , PMBUS power information (J15), and programming the IPMI mcu (J17)

It is important that you do not disconnect or move the service card during operation. The high pitch card edge connecter J1 can cause signals to short together, easily resulting in damage.


ECP5 JTAG

There are 3 connectors J3,4, and 5 each the signals for each of the 3 lanes of 7 ECP5s. if you notice in the above image a modification is required to be done if you want to talk with all 21 FPGAs at once. First Pins 4 & 5, TMS and TCK respectively, are connected together across the 3 connectors. Second TDI and TDO are chained by taking TDO of J4 connecting it to TDI of J3 and then completing the chain by connecting J3 TDO to J5 TDI. The result is that lane 1 is chained to lane 0 which is chained to lane 2. You can read more on page 2 of the service card schematics

Artix 7 JTAG

J16 and J2 are connected to the same JTAG lines of the Artix 7. Both are present to allow use of a variety of programmers. J16 is wired to the normal OEM Xilinx 14 pin programmer cable, but it is strongly recommended you double check your programmer is wired up the same way.

PMBus

IPMI SPI

LED indicators

There are 3 informational RGB LEDs on the VSX accelerator card located at the top of the card. Table !!!!!!! below outlines what each of the 3 LEDs are connected to. At this point in time the IPMI light is not in use. by default the IPMI MCU has been left unprogrammed

Name	Res Des	Red	Green	Blue	Comment
Status	D1	led0_r	led0_g	led0_b	By default, this indicates clock running but is user changeable
Pgood	D2	pgoodn	n/a	Xil_cfg_done	Critical boot/configuration information
IPMI	D3	n/a	Ipmi_led	n/a	By default unused but can Indicate the IPMI controller is powered and running

For more information see pg 68 of the schematics for precisely how they are wired up and !!!!!! block for the default logical functionality of user changeable led0 (D1)

Expected behavior

This section is dedicated to what the LEDs do with the default bitstreams loaded in normal operation from initial power to normal operation.

Event	Status	Pgood	IPMI
Prepost initialization	Solid Green	Solid Blue	n/a
After Post & normal use	Flashing between RGB	Solid Blue	n/a

Status is driven by the led_rgb component layed out in led_rgb.vhd.

Debug of unexpected behavior

This section is dedicated to describing what is occurring and what action should be taken when the LEDs are indicating something other than normal behavior outlined in !!!!!! section.

Event	Status	PGood	IPMI	Action
Bad Power	n/a	red	n/a	Turn off immediately
Bitstream didn’t load	n/a	n/a	n/a	Reboot System
Reprogramming the Artix 7 or Flash	n/a	Blue	n/a	n/a
PCIe didn’t init during post in time	Green	Blue	n/a	Reboot system
		n/a

Drivers

By default the Artix 7 is loaded with a bitstream that utilizes the Xillybus IPcore that is generally supported out of the box by current Linux distributions

Single Card

The Xillybus drivers are preinstalled on most Linux distributions for a single VSX card. To Confirm that the host registered the card and loaded the driver correctly there are 2 steps. 1st we want to confirm that the card initialized correctly by greping lspci as seen in the code below. We want to confirm 3 number of things, that all the lanes got picked up it saw the correct device, and the correct drivers were loaded.


After checking lspci ensure that all the device file paths are accessible by checking /dev. 8 device files should be present xillybus_read & write for lanes 0,1,2, and the SPI bus.


TODO Renaming the file paths temp fix

Multiple Card

TODO Installing the xilly multi drivers