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Merge remote-tracking branch 'tonioni/master'
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@midwan
midwan committed Jan 6, 2025
2 parents 57fab26 + 43f850e commit 8539e6c
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Showing 7 changed files with 138 additions and 98 deletions.
63 changes: 12 additions & 51 deletions blitter.cpp
View file
Original file line number Diff line number Diff line change
Expand Up @@ -73,7 +73,6 @@ extern uae_u8 agnus_hpos;
#define BLITTER_PIPELINE_LASTD 0x1000
#define BLITTER_PIPELINE_FIRST 0x2000
#define BLITTER_PIPELINE_LAST 0x4000
#define BLITTER_PIPELINE_CPU_FREE 0x8000

#define BLIT_NASTY_CPU_STEAL_CYCLE_COUNT 3

Expand Down Expand Up @@ -110,7 +109,7 @@ struct bltinfo blt_info;
static uae_u8 blit_filltable[256][4][2];
uae_u32 blit_masktable[BLITTER_MAX_WORDS];

static int blit_cyclecounter, blit_waitcyclecounter;
static int blit_cyclecounter;
static int blit_maxcyclecounter, blit_slowdown, blit_totalcyclecounter;
static int blit_misscyclecounter;

Expand All @@ -124,7 +123,6 @@ static evt_t blit_firstline_cycles;
static evt_t blit_first_cycle;
static int blit_last_cycle, blit_dmacount, blit_cyclecount;
static int blt_delayed_irq;
//static uae_u16 ddat;
static int blit_dof;

static uae_u16 debug_bltcon0, debug_bltcon1;
Expand Down Expand Up @@ -880,17 +878,20 @@ static void blitter_loadadat(uae_u16 dat)
uae_u32 blitahold;
uae_u16 ashift = blt_info.bltcon0 >> 12;
uae_u16 bltadat = blt_info.bltadat;

if (dat & BLITTER_PIPELINE_FIRST) {
bltadat &= blt_info.bltafwm;
}
if (dat & BLITTER_PIPELINE_LAST) {
bltadat &= blt_info.bltalwm;
}

if (blitdesc) {
blitahold = (((uae_u32)bltadat << 16) | blt_info.bltaold) >> (16 - ashift);
} else {
blitahold = (((uae_u32)blt_info.bltaold << 16) | bltadat) >> ashift;
}

blt_info.bltaold = bltadat;
blt_info.bltahold2 = blitahold;
}
Expand Down Expand Up @@ -1438,7 +1439,6 @@ static void blitter_dodma_new(struct rgabuf *rga, int ch, bool addmod)
}
case 2: // B
{
int bshift = blt_info.bltcon1 >> 12;
uae_u16 reg = 0x72;
record_dma_blit(rga->reg, 0, pt);
blt_info.bltbdat = dat = chipmem_wget_indirect(pt);
Expand Down Expand Up @@ -1482,37 +1482,9 @@ static void blitter_dodma_new(struct rgabuf *rga, int ch, bool addmod)
#endif
}

static bool blitter_idle_cycle_register_write(uaecptr addr, uae_u32 v)
{
addrbank *ab = &get_mem_bank(addr);
if (ab != &custom_bank)
return false;
addr &= 0x1fe;
if (v == 0xffffffff) {
v = regs.chipset_latch_rw;
}
if (addr == 0x40) {
blt_info.bltcon0 = v;
blit_bltset(1);
return true;
} else if (addr == 0x42) {
blt_info.bltcon1 = v;
blit_bltset(2);
return true;
}
return false;
}

static bool decide_blitter_idle(uaecptr addr, uae_u32 value)
static void decide_blitter_idle(uae_u32 value)
{
markidlecycle();
if (addr != 0xffffffff) {
shifter_skip_b_old = shifter_skip_b;
shifter_skip_y_old = shifter_skip_y;
blitfill_old = blitfill;
return blitter_idle_cycle_register_write(addr, value);
}
return false;
}

static void calc_mods(void)
Expand Down Expand Up @@ -1572,20 +1544,18 @@ void process_blitter(struct rgabuf *rga)
bool line = (dat & BLITTER_PIPELINE_LINE) != 0;

bool addmod = (dat & BLITTER_PIPELINE_ADDMOD) != 0;
bool written = false;
uaecptr addr = 0xffffffff;
uae_u32 value = 0;
int added = 0;

blit_totalcyclecounter++;

if (c == 0) {

written = decide_blitter_idle(addr, value);
decide_blitter_idle(value);

} else if (c == 1 && line) { // line 1/4 (A, free)

written = decide_blitter_idle(addr, value);
decide_blitter_idle(value);
if (dat & BLITTER_PIPELINE_FIRST) {
blitter_line_proc_status();
blitter_line_proc_apt();
Expand Down Expand Up @@ -1617,7 +1587,7 @@ void process_blitter(struct rgabuf *rga)

} else if (c == 5 && line) { // line 3/4 (free)

written = decide_blitter_idle(addr, value);
decide_blitter_idle(value);

// this needs to be done before D channel transfer
// because onedot state needs to be known 1 CCK in advance
Expand Down Expand Up @@ -1755,14 +1725,6 @@ void generate_blitter(void)
blt_info.blit_queued = BLITTER_MAX_PIPELINED_CYCLES;
}

#if 0
// Skip BLTSIZE write cycle
if (blit_waitcyclecounter) {
blit_waitcyclecounter = 0;
goto end;
}
#endif

if (blt_info.blit_queued) {

// CPU steals the cycle if CPU has waited long enough and current cyle is not free.
Expand Down Expand Up @@ -1961,6 +1923,7 @@ static void blitter_force_finish(bool state)
void reset_blit(int bltcon)
{
if (!blt_info.blit_queued) {
blitdesc = blt_info.bltcon1 & BLTDESC;
return;
}
if (bltcon) {
Expand Down Expand Up @@ -2119,7 +2082,6 @@ void do_blitter(int copper, uaecptr pc)
}

blit_maxcyclecounter = 0x7fffffff;
blit_waitcyclecounter = 0;

if (blitter_cycle_exact) {
if (immediate_blits) {
Expand All @@ -2135,7 +2097,6 @@ void do_blitter(int copper, uaecptr pc)
blitter_hcounter = 0;
blitter_vcounter = 0;
blit_cyclecounter = -CYCLECOUNT_START;
blit_waitcyclecounter = 1;
blit_maxcyclecounter = blt_info.hblitsize * blt_info.vblitsize + 2;
blt_info.blit_pending = 0;
blt_info.blit_main = 1;
Expand Down Expand Up @@ -2417,7 +2378,7 @@ uae_u8 *save_blitter(size_t *len, uae_u8 *dstptr, bool newstate)
if (dstptr) {
dstbak = dst = dstptr;
} else {
dstbak = dst = xmalloc(uae_u8, 16);
dstbak = dst = xmalloc(uae_u8, 1000);
}

if (blt_info.blit_main) {
Expand Down Expand Up @@ -2468,7 +2429,7 @@ uae_u8 *restore_blitter_new(uae_u8 *src)

blit_first_cycle = restore_u32();
blit_last_cycle = restore_u32();
blit_waitcyclecounter = restore_u32();
restore_u32();
restore_u32();
blit_maxcyclecounter = restore_u32();
blit_firstline_cycles = restore_u32();
Expand Down Expand Up @@ -2661,7 +2622,7 @@ uae_u8 *save_blitter_new(size_t *len, uae_u8 *dstptr)

save_u32((uae_u32)blit_first_cycle);
save_u32(blit_last_cycle);
save_u32(blit_waitcyclecounter);
save_u32(0);
save_u32(0); //(blit_startcycles);
save_u32(blit_maxcyclecounter);
save_u32((uae_u32)blit_firstline_cycles);
Expand Down
46 changes: 36 additions & 10 deletions custom.cpp
View file
Original file line number Diff line number Diff line change
Expand Up @@ -1565,8 +1565,9 @@ void compute_framesync(void)
if (vidinfo->drawbuffer.extrawidth == -2 && ((new_beamcon0 & (BEAMCON0_VARVBEN | bemcon0_vsync_mask)) || currprefs.gfx_overscanmode >= OVERSCANMODE_EXTREME)) {
vidinfo->drawbuffer.extrawidth = -1;
}
int maxv = current_linear_vpos - (minfirstline > vsync_startline ? minfirstline - vsync_startline : 0);
vidinfo->drawbuffer.inheight = (maxv + 1) << vres2;
int mfl = minfirstline + 1;
int maxv = current_linear_vpos - (mfl > vsync_startline ? mfl - vsync_startline : 0);
vidinfo->drawbuffer.inheight = maxv << vres2;
vidinfo->drawbuffer.inheight2 = vidinfo->drawbuffer.inheight;
vidinfo->drawbuffer.inxoffset = 0;

Expand Down Expand Up @@ -1701,7 +1702,7 @@ static void init_beamcon0(void)
display_hstart_cyclewait_end = 6;
} else if (currprefs.gfx_overscanmode <= OVERSCANMODE_OVERSCAN) {
display_hstart_cyclewait = 32;
display_hstart_cyclewait_end = 8;
display_hstart_cyclewait_end = 7;
} else if (currprefs.gfx_overscanmode == OVERSCANMODE_EXTREME) {
display_hstart_cyclewait = 22;
display_hstart_cyclewait_end = 0;
Expand Down Expand Up @@ -8438,7 +8439,7 @@ uae_u8 *save_cycles(size_t *len, uae_u8 *dstptr)
if (dstptr)
dstbak = dst = dstptr;
else
dstbak = dst = xmalloc(uae_u8, 1000);
dstbak = dst = xmalloc(uae_u8, 128);
save_u32(1);
save_u32(CYCLE_UNIT);
save_u64(get_cycles());
Expand Down Expand Up @@ -8619,7 +8620,7 @@ static uae_u16 fetch16(struct rgabuf *r)
return v;
}

static uae_u32 fetch32(struct rgabuf *r)
static uae_u32 fetch32_bpl(struct rgabuf *r)
{
uae_u32 v;
uaecptr p = r->pv;
Expand All @@ -8644,6 +8645,31 @@ static uae_u32 fetch32(struct rgabuf *r)
return v;
}

static uae_u32 fetch32_spr(struct rgabuf *r)
{
uae_u32 v;
uaecptr p = r->pv;
uaecptr pm = p & ~3;
if (p & 2) {
v = chipmem_lget_indirect(pm) & 0x0000ffff;
v |= v << 16;
} else if (fetchmode_fmode_spr & 2) { // optimized (fetchmode_fmode & 3) == 2
v = chipmem_lget_indirect(pm) & 0xffff0000;
v |= v >> 16;
} else {
v = chipmem_lget_indirect(pm);
}
#ifdef DEBUGGER
if (memwatch_enabled) {
debug_getpeekdma_value_long(v, p - pm);
}
if (debug_dma) {
record_dma_read_value_wide(v, false);
}
#endif
return v;
}

static uae_u64 fetch64(struct rgabuf *r)
{
uae_u64 v;
Expand Down Expand Up @@ -10126,7 +10152,7 @@ static void do_scandouble(void)
if (fetchmode_fmode_bpl == 3) {
rd->v64 = fetch64(&rga);
} else if (fetchmode_fmode_bpl > 0) {
rd->v = fetch32(&rga);
rd->v = fetch32_bpl(&rga);
} else {
rd->v = fetch16(&rga);
}
Expand Down Expand Up @@ -10263,9 +10289,9 @@ static void process_sprites_fast(void)
pos = fs->data64[0] >> 48;
ctl = fs->data64[1] >> 48;
} else if (fetchmode_fmode_spr == 1) {
fs->data[0] = fetch32(&r);
fs->data[0] = fetch32_spr(&r);
r.pv += 4;
fs->data[1] = fetch32(&r);
fs->data[1] = fetch32_spr(&r);
r.pv += 4;
pos = fs->data[0] >> 16;
ctl = fs->data[1] >> 16;
Expand Down Expand Up @@ -11112,7 +11138,7 @@ static void handle_rga_out(void)
}
sdat = dat;
} else if (fetchmode_fmode_spr == 1) {
uae_u32 dat = fetch32(r);
uae_u32 dat = fetch32_spr(r);
sdat = dat >> 16;
if (!dmastate) {
write_drga(r->reg, pt, sdat);
Expand Down Expand Up @@ -11175,7 +11201,7 @@ static void handle_rga_out(void)
write_drga(r->reg, pt, dat);
regs.chipset_latch_rw = (uae_u16)dat;
} else if (fetchmode_fmode_bpl == 1) {
uae_u32 dat = fetch32(r);
uae_u32 dat = fetch32_bpl(r);
write_drga(r->reg, pt, dat);
regs.chipset_latch_rw = (uae_u16)dat;
} else {
Expand Down
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