firtool-1.99.2

What's Changed

• [Seq] Fix FIFO lowering to correct depth and pointer increments by @teqdruid in #8003
• [ESI] FIFO with ESI channels by @teqdruid in #8004
• [LowerToBMC] Topologically sort module body before inlining to BMC op by @TaoBi22 in #8007
• [PyCDE] Update build flow by @teqdruid in #8008
• [ESI] FIFO: support valid/ready on inputs and outputs by @teqdruid in #8009
• [PyCDE] Add fork, join, and merge channel functions by @teqdruid in #8011
• [Comb] delete slow canonicalizer by @youngar in #8014

Full Changelog: firtool-1.99.1...firtool-1.99.2

firtool-1.99.1

What's Changed

• [RTG] Add operation and types to represent labels by @maerhart in #7964
• [CD] Install nanobind when building wheels. by @mikeurbach in #8005

Full Changelog: firtool-1.99.0...firtool-1.99.1

firtool-1.99.0

What's Changed

• Bump LLVM to b0b546d44777eb1fa25995384876bd14a006a929. by @mikeurbach in #7976
• [SCFToCalyx] buildLibraryOp cast floating point to integer types by @jiahanxie353 in #7977
• [SCFToCalyx] Add indent size annotation when writing json files by @jiahanxie353 in #7993
• [firtool] initialize the disableLayerSink flag by @youngar in #7995
• [MooreToCore] Lower the unpacked array type to hw.array by @slowlime in #7893
• [FIRRTL] Support MarkDUTAnnotation on extmodules. by @mikeurbach in #8001

New Contributors

• @slowlime made their first contribution in #7893

Full Changelog: firtool-1.98.0...firtool-1.99.0

firtool-1.98.0

What's Changed

• [RTG] Add ElaborationPass by @maerhart in #7876
• [RTG][Elaboration] Elaboration support for Bags by @maerhart in #7892
• [RTG] Add set union operation by @maerhart in #7916
• [RTG] Add bag union operation by @maerhart in #7917
• [RTG] Add set_size op for sets and bag_unique_size op for bags by @maerhart in #7920
• [RTG] Elaboration support for set_size and bag_unique_size operations by @maerhart in #7921
• [DC] Add + re-enable canonicalization patterns by @mortbopet in #7952
• [llvm] Revert LLVM de-bump by @seldridge in #7962
• [OM] Generalize handling for list creation ops in FreezePaths. by @mikeurbach in #7965
• [FIRRTL][CAPI] Add more functions for discriminating and querying type by @SpriteOvO in #7960
• [circt-bmc] Add option to print solver output & assertions by @TaoBi22 in #7974
• Fix warnings about unused variables when assertions are disabled (NFC) by @maerhart in #7975
• [SCFToCalyx] Fix json naming when there are multiple components by @jiahanxie353 in #7980
• Re-land: [FIRRTL][CAPI] Add more functions for discriminating and querying type by @SpriteOvO in #7972
• [CombToAIG] Add mux lowering by @uenoku in #7966
• [CombToAIG] Add a lowering for Add/Sub by @uenoku in #7968
• [LLHD] Fix misprint in llhd-desequentialize pass by @AndreyVV-100 in #7985
• [FIRRTL] AdvancedLayerSink: don't sink instances of mods with port annos by @rwy7 in #7982
• [InstanceChoice] Move specialize options pass earlier in the firtool pipeline by @prithayan in #7988
• [firtool] Add option to disable layer sink by @youngar in #7981

Full Changelog: firtool-1.97.1...firtool-1.98.0

firtool-1.97.1

What's Changed

• [SMT] Require SolverOp parent for SetLogicOp by @TaoBi22 in #7950
• [SMT] Add Z3 lowering for set_logic op by @TaoBi22 in #7930
• [DC] Initial values were being ignored by @teqdruid in #7945

Full Changelog: firtool-1.97.0...firtool-1.97.1

firtool-1.97.0

What's Changed

• [firtool] Add an option to disable CSE in classes by @prithayan in #7931
• [RTG] Add BagType and operations by @maerhart in #7887
• [HWToBTOR2] Generate register initial constant before state declaration by @TaoBi22 in #7939
• [RTG] Generate separate doc files for ops and types by @maerhart in #7940
• [DC] Add unused fork result elimination canonicalizer by @teqdruid in #7936
• [FIRRTL] Remove NestedPrefixModulesAnnotation by @seldridge in #7944
• [Arc] Refactor C++ header generator script to use Jinja templates by @gtxzsxxk in #7929
• [CombToAIG] Populate legal ops by @uenoku in #7941
• [FIRRTL] Clock gate extraction work w/ prefixing by @seldridge in #7946
• [RTG][RTGTest] Add CAPI and a basic lowering pipeline by @maerhart in #7882
• [RTG][RTGTest] Add Python Bindings by @maerhart in #7883
• [RTG] Add BagType CAPI and Python Bindings by @maerhart in #7888
• [ExportVerilog] Fix ifdef of macro w/ Verilog name by @seldridge in #7947
• [LowerTypes] Copy discardable attributes when cloning operations by @uenoku in #7948
• [FIRRTL] Add a new FIRRTL annotation to specify type lowering behavior of module body by @uenoku in #7751
• [RTG] Add RegisterOpInterface by @maerhart in #7902
• [FIRRTL][CAPI] Add documentation by @SpriteOvO in #7668
• [MooreToCore] Add multibit DetectEventOp support by @AndreyVV-100 in #7943
• Lower MemRef GetGlobal and write data to json files by @jiahanxie353 in #7301
• [FirParser] Add instance choice selection as circt attribute by @prithayan in #7951
• [SCFToCalyx] memref::getGlobalOp write to json using explicit toString for path to fix Windows failed test by @jiahanxie353 in #7953
• [InstanceChoice] Add the instance choice specialization pass to firtool by @prithayan in #7933
• [SCFToCalyx] replace shell command with %T for Windows in the test file by @jiahanxie353 in #7956
• [InstanceChoice] Add a default override for unspecified options by @prithayan in #7955
• [ImportVerilog] Add HierarchicalNames.cpp to support hierarchical names. by @hailongSun2000 in #7382
• [MooreToCore] Support pows and powu op by @Max-astro in #7899

New Contributors

• @gtxzsxxk made their first contribution in #7929
• @AndreyVV-100 made their first contribution in #7943

Full Changelog: firtool-1.96.0...firtool-1.97.0

firtool-1.96.0

What's Changed

• [VerifToSMT] Only update registers on clock posedge by @TaoBi22 in #7878
• [Verif] Require a clock when num_regs is non-zero on a BMC op by @TaoBi22 in #7891
• [Ibis] Rename to 'Kanagawa' by @teqdruid in #7832
• [firtool] Run LowerFormalToHW pass when emitting SV by @fabianschuiki in #7837
• [firtool] Fix formal test by @fabianschuiki in #7894
• SCF IndexSwitch to nested If-Else by @jiahanxie353 in #7670
• [CI] Bump integration test image to 18.0 by @fabianschuiki in #7895
• [FIRRTL] Make IMDCE work for ops w/ regions/blocks by @seldridge in #7881
• [circt-test] fix lit config for circt-bmc by @unlsycn in #7884
• [circt-bmc] Drop outdated integration test by @TaoBi22 in #7898
• [circt-bmc][VerifToSMT] Pop existing assertions on each cycle by @TaoBi22 in #7900
• [FIRRTL] Cleanup transform includes, NFC by @seldridge in #7901
• [circt-test] fix lit config for circt-bmc by @unlsycn in #7897
• SCF IndexSwitch to nested If-Else by @jiahanxie353 in #7905
• [FIRRTL] Remove all traces of OMIR JSON support. by @mikeurbach in #7907
• [DC] Add CAPI bindings for DC by @teqdruid in #7906
• [FIRRTL] Rip out OMIRTracker and logic that uses it. by @mikeurbach in #7908
• [SCFToCalyx] remove redundant build switch group by @jiahanxie353 in #7910
• [HandshakeToDC] Getting some working tests by @teqdruid in #7858
• [PyCDE][Handshake] Add bindings for Handshake functions by @teqdruid in #7849
• [FIRRTL] FoldRegMems: insert new ops into same block as memory by @rwy7 in #7909
• [HW] ExportHier: do not include bound in modules by @youngar in #7915
• [ImportVerilog] add stream concat operation by @chenbo-again in #7784
• [FIRRTL] FoldUnusedBits: Cast compressed data back to signed integer by @rwy7 in #7913
• [FIRRTL] FoldUnusedBits: minor cleanup by @rwy7 in #7914
• [Calyx] Lower Arith CmpFOp to Calyx by @jiahanxie353 in #7860
• [HWToSMT] ArrayCreateOp and ArrayGetOp support by @maerhart in #7666
• [circt-bmc] Add a simple test with a register storing an aggregate by @maerhart in #7922
• [circt-bmc][VerifToSMT] Add initial value support by @TaoBi22 in #7903
• [Calyx] Avoid using designated initializers by @TaoBi22 in #7926
• [VerifToSMT] Exit early after too many clocks error by @TaoBi22 in #7923
• [SMT] Add set_logic operation by @TaoBi22 in #7927
• [FIRRTL] Support layers in MergeConnections by @seldridge in #7912
• Fix URL for firrtl spec by @sequencer in #7919
• [RTG] Add TestOp, TargetOp, and DictType by @maerhart in #7856

New Contributors

• @unlsycn made their first contribution in #7884
• @chenbo-again made their first contribution in #7784

Full Changelog: firtool-1.95.1...firtool-1.96.0

firtool-1.95.1

This reverts a change to a canonicalizer which could create use-before-def. This wasn't observed with internal testing, but the risk remains.

Full Changelog: firtool-1.95.0...firtool-1.95.1

firtool-1.95.0

What's Changed

• [RTG] Add set type and operations by @maerhart in #7848
• [RTG] Add op and type visitors by @maerhart in #7855
• [HWToBTOR2] Use APInt value directly in constant generation by @TaoBi22 in #7853
• [HWToBTOR2] Avoid duplicating initial consts by @TaoBi22 in #7854
• [SeqToSV] Do not use always_ff for compreg with initializer by @fzi-hielscher in #7838
• [NFC] Output unused test results to /dev/null by @fzi-hielscher in #7859
• [SCFToCalyx] buildLibraryBinaryPipeOp source operation result replacement by @jiahanxie353 in #7862
• [ImportVerilog]: Create variables for function arguments by @Max-astro in #7829
• [NFCI][HWToBTOR2] Avoid running HWToBTOR2 pass in parallel by @fzi-hielscher in #7864
• [FIRRTL] Lower firrtl.formal to verif.formal by @fabianschuiki in #7836
• [Handshake][Python] Add Python bindings for Handshake by @teqdruid in #7846
• [Verif] Make verif.formal parameters an ODS property by @fabianschuiki in #7867
• [circt-test] Add runner for circt-bmc by @fabianschuiki in #7857
• [HandshakeToDC] Implement ESIInstanceOp lowering by @teqdruid in #7871
• Bump LLVM to 3cc852ece438a63e7b09d1c84a81d21598454e1a. by @mikeurbach in #7847
• [HWToBTOR2] Error on variadic ops (for now) by @TaoBi22 in #7866
• [SMT] Add push/pop operations by @TaoBi22 in #7865
• [SMT] Add SMTLIB export for push & pop operations by @TaoBi22 in #7873
• [SMT] Add integration tests for smt.reset by @TaoBi22 in #7874
• [FIRRTL] Dedup: dedup private modules into public ones by @youngar in #7877
• [FIRRTL] LowerTypes: Manually compact newArgs vector by @rwy7 in #7869
• [FIRRTL] Rewrite, extend CheckLayers for GC Views by @seldridge in #7879
• [FIRRTL] FoldRegMems: insert new ops into same block as memory by @rwy7 in #7868

New Contributors

• @Max-astro made their first contribution in #7829

Full Changelog: firtool-1.94.0...firtool-1.95.0

firtool-1.94.0

What's Changed

• [FIRRTL] Update, fix parser versions by @seldridge in #7827
• [FIRRTL] LowerClasses: drop the IR mapping by @rwy7 in #7824
• [Calyx] Lower SCF parallel op to Calyx by @jiahanxie353 in #7830
• [FIRRTL] LowerTypes: Manually compact newArgs vector by @rwy7 in #7831
• [HWToBTOR2][NFC] update 'PowerOn' in error message and comments by @TaoBi22 in #7845
• [HandshakeToDC] Add clock and reset ports by @teqdruid in #7825
• [CAPI][Python][Arc, HW] Register Arc and HW passes by @yassinz in #7790
• [Calyx] Binary Floating Point MulF Operator by @jiahanxie353 in #7769
• [RTG] Add Random Test Generation dialect by @maerhart in #7833
• [RTG] Add sequence_closure and invoke_sequence operations by @maerhart in #7839
• [RTG] Add context resource interfaces by @maerhart in #7840
• [RTGTest] Add RTGTest dialect by @maerhart in #7841
• [HWToBTOR2] Fix slice lowering argument meanings by @TaoBi22 in #7842
• [ExternalizeRegisters][NFC] Clean up initial value fetching by @TaoBi22 in #7843
• [HWToBTOR2] Fix crashes on initial value corner cases by @TaoBi22 in #7844
• [HWToBTOR2] Swap to temp file placeholder by @TaoBi22 in #7852

New Contributors

• @yassinz made their first contribution in #7790

Full Changelog: firtool-1.93.1...firtool-1.94.0