GitHub - jbentham/pedla: Wireless logic analyser

Branches Tags

Name		Name	Last commit message	Last commit date
Latest commit History 1 Commit
firmware_new		firmware_new
picowi		picowi
test		test
.gitattributes		.gitattributes
CMakeLists.txt		CMakeLists.txt
LICENSE		LICENSE
README.txt		README.txt
la_console.c		la_console.c
la_console.h		la_console.h
la_pico.c		la_pico.c
la_pico.h		la_pico.h
la_wifi.c		la_wifi.c
la_wifi.h		la_wifi.h
mongoose.c		mongoose.c
mongoose.h		mongoose.h
pedla.c		pedla.c
pedla.sln		pedla.sln
pedla.vgdbproj		pedla.vgdbproj
pedla_cfg.c		pedla_cfg.c
pedla_cfg.h		pedla_cfg.h

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This is the source code for the Iosoft PEDLA project, using the VisualGDB development environment,
and the Mongoose TCP/IP stack. It runs on the PEDLA v2 hardware, with an RP2040W WiFi module.

This project was created for monitoring the EDSAC 3000 valve (tube) computer, and as such
has some quite complex interaactions with the hardware. It is not recommended as a starting-point
for experimenting with logic analysis on the RP2040; the 'wicap' project is much simpler.

See https://iosoft.blog/pedla and https://iosoft.blog/wicap for more information

JPB 19/8/24