Add multi-communication-domain support

[uv-xiao]

Summary

• Add the new multi-communication-domain public surface:
  CommDomain, CommDomainPlan, ChipDomainBootstrapConfig, and
  domain-aware ChipContext.domains[name].
• Derive per-chip bootstrap configs from one L3-level CommDomainPlan, with
  dense domain ranks defined by CommDomain.worker_indices order.
• Replace the old public single-domain bootstrap surface with the new
  domain-plan path; single-domain usage is now expressed as one
  CommDomain("default", ...).
• Keep explicit ChipBootstrapConfig support for per-chip data such as host
  staging, keyed by (domain_name, buffer_name).
• Extend the runtime/bootstrap path to publish multiple named domain contexts,
  carve symmetric per-domain buffers, and pass domain-local CommContext*
  pointers to PTO-ISA kernels.
• Extend both onboard/HCCL and sim communication backends for the base-window
  plus derived-domain-context model.
• Migrate existing communication examples to the new surface and add two
  focused multi-domain examples:
  workers/l3/domain_rank_map and workers/l3/dual_domain_overlap.
• Add design, implementation, validation, and handoff documentation under
  docs/.

Backend Notes

• On onboard A2/A3, visible communication domains are slices of one hidden base
  communication window. Kernels communicate with domain-local ranks through
  the derived domain CommContext.
• On sim, the base window is a POSIX shared-memory segment. The sim backend
  derives host-resident domain CommContext objects by remapping
  windowsIn[]/windowsOut[] through the domain rank list and window offset.
• HCCL collective kernels are intentionally out of scope. This PR uses
  HCCL/HCOMM resources for windows and PTO-ISA RMA-style communication in
  kernels.

Validation

• Focused unit and sim tests pass: 30 tests covering domain-plan derivation,
  bootstrap channels, sim bootstrap, worker-level sim orchestration, and error
  cleanup.
• Hardware bootstrap unit test passes on A2/A3.
• Public examples pass on hardware when excluding the known
  sdma_async_completion_demo failure.
• workers/l3/domain_rank_map passes on hardware with CANN 8.5 on devices
  12,13,14.
• python -m py_compile passes for the updated SDMA demo.
• markdownlint-cli2 and git diff --check pass for the touched docs.

Known Limitation

• a2a3/sdma_async_completion_demo still fails and is tracked as a remaining
  SDMA/HCCL resource setup issue, not as a multi-domain bootstrap failure.
• CANN 8.5 lacks aclnnShmemSdmaStarsQuery when SDMA workspace support is
  enabled.
• CANN 9.0 beta.2 removes the missing-symbol issue, but
  HcclAllocComResourceByTiling still returns 15 on tested card pairs and
  also affects non-SDMA domain_rank_map.
• The same SDMA demo failure path also reproduces on origin/main, so it is
  not yet proven to be introduced by this PR.

[gemini-code-assist]

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