fix(pto): canonicalize rank2 view IR forms

include/PTO/Transforms/Passes.h

@@ -104,6 +104,7 @@ std::unique_ptr<Pass> createExpandTileOpPass();
 std::unique_ptr<Pass> createExpandTileOpPass(const ExpandTileOpOptions &options);
 std::unique_ptr<Pass> createFoldTileBufIntrinsicsPass();
 std::unique_ptr<Pass> createFoldTileBufIntrinsicsPass(llvm::StringRef foldMode);
+std::unique_ptr<Pass> createPTOCanonicalizeIRPass();
 std::unique_ptr<Pass>
 createPTOInlineLibCallPass(const PTOInlineLibCallOptions &options = {});
 void registerPTOViewToMemrefPass();

include/PTO/Transforms/Passes.td

@@ -480,6 +480,30 @@ def FoldTileBufIntrinsics : Pass<"pto-fold-tile-buf-intrinsics", "mlir::func::Fu
   ];
 }
 
+def PTOCanonicalizeIR : Pass<"pto-canonicalize-ir", "func::FuncOp"> {
+  let summary = "Canonicalize rank-2 view descriptors into rank-5 form (VPTO-only)";
+  let description = [{
+    Rewrites rank-2 tensor_view / partition_tensor_view descriptors into the
+    canonical right-aligned rank-5 form [1, 1, 1, R, C], matching the 5D
+    descriptor layout expected by VPTO lowering. Stride expansion uses the
+    same cumulative-product rule as rightAlignTo5D and
+    buildGlobalTensorShapeAndStride: stride[i] = shape[i+1] * stride[i+1].
+
+    Currently gated on --pto-backend=vpto to limit blast radius. A3/A5
+    EmitC codegen already pads strides to rank-5 via InferPTOLayout and
+    buildGlobalTensorShapeAndStride, so it does not need this pass at the
+    IR level. The gate can be lifted once the pass is proven stable.
+
+    A post-canonicalization verification detects any surviving rank-2 view
+    types to prevent silent failures when new view-consuming ops are added.
+  }];
+  let constructor = "mlir::pto::createPTOCanonicalizeIRPass()";
+  let dependentDialects = [
+    "mlir::pto::PTODialect",
+    "mlir::arith::ArithDialect"
+  ];
+}
+
 def PTOInlineLibCall : Pass<"pto-inline-libcall", "ModuleOp"> {
   let summary = "Materialize OP-Lib instance bodies and inline OP-Lib calls";
   let description = [{

lib/PTO/IR/PTO.cpp

@@ -1734,6 +1734,16 @@ static std::optional<pto::Layout> getLogicalViewLayout(Value value) {
   if (auto part = value.getDefiningOp<pto::PartitionViewOp>())
     return getLogicalViewLayout(part.getSource());
   if (auto make = value.getDefiningOp<pto::MakeTensorViewOp>()) {
+    // Prefer the explicit layout attribute when available.  After rank-2 →
+    // rank-5 canonicalization, the padded leading strides satisfy the ND
+    // (row-major) recurrence even for DN (col-major) data, so inferLayout
+    // alone would misclassify DN as ND (the col-major recurrence breaks at
+    // the boundary between padded unit-extent dims and real dims).  The
+    // layout attribute carries the *intended* memory layout and is the
+    // authoritative source — inferLayout is only a fallback for views that
+    // lack an explicit layout.
+    if (auto layoutAttr = make.getLayoutAttr())
+      return layoutAttr.getLayout();
     auto tvTy = dyn_cast<pto::TensorViewType>(make.getResult().getType());
     if (!tvTy)
       return std::nullopt;

lib/PTO/Transforms/CMakeLists.txt

@@ -55,6 +55,7 @@ add_mlir_dialect_library(PTOTransforms
   PTORemoveRedundantBarrier.cpp
   InferPTOLayout.cpp
   PTOA5NormalizeTMovPass.cpp
+  PTOCanonicalizeIR.cpp
   PTOMaterializeTileHandles.cpp
   BufferizableOpInterfaceImpl.cpp
   ConvertToPTOOp.cpp