Added support for mesif protocol

Makefile

@@ -4,7 +4,7 @@ LD = g++
 LDFLAGS = -std=c++0x
 EXENAME = wicked test
 
-wicked : main.o cache.o snoop.o memops.o protocol.o
+wicked : clean main.o cache.o snoop.o memops.o protocol.o
 	$(LD) $(LDFLAGS) main.o cache.o snoop.o memops.o protocol.o -o wicked
 
 all : wicked test

mat-mult.py

@@ -18,6 +18,6 @@
 	for j in range(col * N/2, col * N/2 + N/2):
 		for k in range(N):
 			print "10 1 %x" %(addrA + data_size * (i * N + k))
-			print "5 1 %x" %(addrB + data_size * (j * N + k))
+			print "5 1 %x" %(addrB + data_size * (k * N + j))
 			print "8 1 %x" %(addrC + data_size * (i * N + j))
 			print "20 2 %x" %(addrC + data_size * (i * N + j))

mesif.h

@@ -13,7 +13,7 @@ class mesif: public Protocol{
     ~mesif(){
         cerr<<"MESIF destructor"<<endl;
     }
-	tuple<char, bool, bool> next_state(int operation, char curr_state){
+	tuple<char, bool, bool> next_state(int operation, char curr_state, bool exclusive){
 		char output;
 		bool write_back = false;
 		bool respond = false;
@@ -54,7 +54,7 @@ class mesif: public Protocol{
         	case 'i' :{
 				switch (operation){
 					case PROC_READ_FROM_CACHE: output = 'f'; break;
-					case PROC_READ_FROM_MEM:   output = 'e'; break;
+					case PROC_READ_FROM_MEM:   output = exclusive ? 'e' : 'f'; break;
 					case PROC_WRITE:           output = 'm'; break;
 					case BUS_READ:             output = 'i'; write_back = false; respond = false; break;
                     case BUS_WRITE:            output = 'i'; write_back = false; respond = false; break;

snoop_config.h

@@ -4,9 +4,9 @@ typedef msi PROTOCOL_TYPE;
 
 // cache specifications
 typedef LRU CACHE_TYPE;
-#define CACHE_SIZE 8
+#define CACHE_SIZE 32
 #define CACHE_NUM_WAYS 4
-#define CACHE_BLOCK_SIZE 16
+#define CACHE_BLOCK_SIZE 32
 
 // system specifications
 #define NUM_PROCESSORS 4