feat(spi_nand_flash): Add micron dual-plane nand flash chip (MT29F2G) support #496
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igrr
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Apr 30, 2025
igrr
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Apr 30, 2025
| uint32_t plane = block % handle->chip.num_planes; | ||
| // The plane index is the bit following the most significant bit (MSB) of the address. | ||
| // For a 2048-byte page (2^11), the plane select bit is the 12th bit, and | ||
| // for a 4096-byte page (2^12), it is the 13th bit. |
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When you say "12th bit", are you using 0-based or 1-based indexing?
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Here I am referring to 0-based indexing. That's why mentioned (2^11), so next bit is 12th. Is it confusing?
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Change description
Micron dual plane chip MT29F2G01ABAGDWB-IT:G support is added.
This is an extension of the PR #397 and includes a fix for an issue with column address calculation when adding plane index.