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Regenerated PAC.
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Frostie314159 committed Oct 22, 2024
1 parent 05455cc commit c4f46a1
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Showing 6 changed files with 198 additions and 8 deletions.
66 changes: 58 additions & 8 deletions esp32/src/wifi.rs
Original file line number Diff line number Diff line change
Expand Up @@ -10,34 +10,39 @@ pub struct RegisterBlock {
rx_descr_last: RX_DESCR_LAST,
_reserved5: [u8; 0x44],
unknown_rx_policy: [UNKNOWN_RX_POLICY; 2],
_reserved6: [u8; 0x01ec],
_reserved6: [u8; 0x01dc],
hw_stat_ack_int: HW_STAT_ACK_INT,
hw_stat_rts_int: HW_STAT_RTS_INT,
hw_stat_cts_int: HW_STAT_CTS_INT,
hw_stat_rifs_int: HW_STAT_RIFS_INT,
hw_stat_rx_success: HW_STAT_RX_SUCCESS,
hw_stat_rx_end: HW_STAT_RX_END,
_reserved8: [u8; 0x04],
_reserved12: [u8; 0x04],
hw_stat_hop_err: HW_STAT_HOP_ERR,
hw_stat_full2: HW_STAT_FULL2,
_reserved10: [u8; 0x0968],
hw_stat_block_err: HW_STAT_BLOCK_ERR,
_reserved15: [u8; 0x0964],
wifi_int_status: WIFI_INT_STATUS,
wifi_int_clear: WIFI_INT_CLEAR,
_reserved12: [u8; 0x68],
_reserved17: [u8; 0x68],
ctrl: CTRL,
tx_error_clear: TX_ERROR_CLEAR,
tx_error_status: TX_ERROR_STATUS,
tx_complete_clear: TX_COMPLETE_CLEAR,
tx_complete_status: TX_COMPLETE_STATUS,
_reserved17: [u8; 0x30],
_reserved22: [u8; 0x30],
tx_slot_config: [TX_SLOT_CONFIG; 5],
_reserved18: [u8; 0x34],
_reserved23: [u8; 0x34],
hw_stat_tx_rts: HW_STAT_TX_RTS,
hw_stat_tx_cts: HW_STAT_TX_CTS,
hw_stat_tx_ack: HW_STAT_TX_ACK,
hw_stat_trcts: HW_STAT_TRCTS,
hw_stat_trigger: HW_STAT_TRIGGER,
hw_stat_tx_hung: HW_STAT_TX_HUNG,
hw_stat_panic: HW_STAT_PANIC,
_reserved25: [u8; 0x03f4],
_reserved30: [u8; 0x03f4],
tx_slot_parameters: [TX_SLOT_PARAMETERS; 5],
_reserved26: [u8; 0x016c],
_reserved31: [u8; 0x016c],
crypto_key_entry: [CRYPTO_KEY_ENTRY; 16],
}
impl RegisterBlock {
Expand Down Expand Up @@ -83,6 +88,26 @@ impl RegisterBlock {
pub fn unknown_rx_policy_iter(&self) -> impl Iterator<Item = &UNKNOWN_RX_POLICY> {
self.unknown_rx_policy.iter()
}
#[doc = "0x2bc - "]
#[inline(always)]
pub const fn hw_stat_ack_int(&self) -> &HW_STAT_ACK_INT {
&self.hw_stat_ack_int
}
#[doc = "0x2c0 - "]
#[inline(always)]
pub const fn hw_stat_rts_int(&self) -> &HW_STAT_RTS_INT {
&self.hw_stat_rts_int
}
#[doc = "0x2c4 - "]
#[inline(always)]
pub const fn hw_stat_cts_int(&self) -> &HW_STAT_CTS_INT {
&self.hw_stat_cts_int
}
#[doc = "0x2c8 - "]
#[inline(always)]
pub const fn hw_stat_rifs_int(&self) -> &HW_STAT_RIFS_INT {
&self.hw_stat_rifs_int
}
#[doc = "0x2cc - "]
#[inline(always)]
pub const fn hw_stat_rx_success(&self) -> &HW_STAT_RX_SUCCESS {
Expand All @@ -103,6 +128,11 @@ impl RegisterBlock {
pub const fn hw_stat_full2(&self) -> &HW_STAT_FULL2 {
&self.hw_stat_full2
}
#[doc = "0x2e0 - "]
#[inline(always)]
pub const fn hw_stat_block_err(&self) -> &HW_STAT_BLOCK_ERR {
&self.hw_stat_block_err
}
#[doc = "0xc48 - Interrupt status of WIFI peripheral"]
#[inline(always)]
pub const fn wifi_int_status(&self) -> &WIFI_INT_STATUS {
Expand Down Expand Up @@ -227,6 +257,22 @@ pub mod rx_descr_last;
pub type UNKNOWN_RX_POLICY = crate::Reg<unknown_rx_policy::UNKNOWN_RX_POLICY_SPEC>;
#[doc = ""]
pub mod unknown_rx_policy;
#[doc = "HW_STAT_ACK_INT (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`hw_stat_ack_int::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hw_stat_ack_int::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hw_stat_ack_int`] module"]
pub type HW_STAT_ACK_INT = crate::Reg<hw_stat_ack_int::HW_STAT_ACK_INT_SPEC>;
#[doc = ""]
pub mod hw_stat_ack_int;
#[doc = "HW_STAT_RTS_INT (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`hw_stat_rts_int::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hw_stat_rts_int::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hw_stat_rts_int`] module"]
pub type HW_STAT_RTS_INT = crate::Reg<hw_stat_rts_int::HW_STAT_RTS_INT_SPEC>;
#[doc = ""]
pub mod hw_stat_rts_int;
#[doc = "HW_STAT_CTS_INT (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`hw_stat_cts_int::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hw_stat_cts_int::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hw_stat_cts_int`] module"]
pub type HW_STAT_CTS_INT = crate::Reg<hw_stat_cts_int::HW_STAT_CTS_INT_SPEC>;
#[doc = ""]
pub mod hw_stat_cts_int;
#[doc = "HW_STAT_RIFS_INT (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`hw_stat_rifs_int::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hw_stat_rifs_int::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hw_stat_rifs_int`] module"]
pub type HW_STAT_RIFS_INT = crate::Reg<hw_stat_rifs_int::HW_STAT_RIFS_INT_SPEC>;
#[doc = ""]
pub mod hw_stat_rifs_int;
#[doc = "HW_STAT_RX_SUCCESS (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`hw_stat_rx_success::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hw_stat_rx_success::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hw_stat_rx_success`] module"]
pub type HW_STAT_RX_SUCCESS = crate::Reg<hw_stat_rx_success::HW_STAT_RX_SUCCESS_SPEC>;
#[doc = ""]
Expand All @@ -243,6 +289,10 @@ pub mod hw_stat_hop_err;
pub type HW_STAT_FULL2 = crate::Reg<hw_stat_full2::HW_STAT_FULL2_SPEC>;
#[doc = ""]
pub mod hw_stat_full2;
#[doc = "HW_STAT_BLOCK_ERR (rw) register accessor: \n\nYou can [`read`](crate::Reg::read) this register and get [`hw_stat_block_err::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hw_stat_block_err::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hw_stat_block_err`] module"]
pub type HW_STAT_BLOCK_ERR = crate::Reg<hw_stat_block_err::HW_STAT_BLOCK_ERR_SPEC>;
#[doc = ""]
pub mod hw_stat_block_err;
#[doc = "WIFI_INT_STATUS (rw) register accessor: Interrupt status of WIFI peripheral\n\nYou can [`read`](crate::Reg::read) this register and get [`wifi_int_status::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wifi_int_status::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wifi_int_status`] module"]
pub type WIFI_INT_STATUS = crate::Reg<wifi_int_status::WIFI_INT_STATUS_SPEC>;
#[doc = "Interrupt status of WIFI peripheral"]
Expand Down
28 changes: 28 additions & 0 deletions esp32/src/wifi/hw_stat_ack_int.rs
Original file line number Diff line number Diff line change
@@ -0,0 +1,28 @@
#[doc = "Register `HW_STAT_ACK_INT` reader"]
pub type R = crate::R<HW_STAT_ACK_INT_SPEC>;
#[doc = "Register `HW_STAT_ACK_INT` writer"]
pub type W = crate::W<HW_STAT_ACK_INT_SPEC>;
#[cfg(feature = "impl-register-debug")]
impl core::fmt::Debug for R {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
write!(f, "{}", self.bits())
}
}
impl W {}
#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`hw_stat_ack_int::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hw_stat_ack_int::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct HW_STAT_ACK_INT_SPEC;
impl crate::RegisterSpec for HW_STAT_ACK_INT_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [`hw_stat_ack_int::R`](R) reader structure"]
impl crate::Readable for HW_STAT_ACK_INT_SPEC {}
#[doc = "`write(|w| ..)` method takes [`hw_stat_ack_int::W`](W) writer structure"]
impl crate::Writable for HW_STAT_ACK_INT_SPEC {
type Safety = crate::Unsafe;
const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
}
#[doc = "`reset()` method sets HW_STAT_ACK_INT to value 0"]
impl crate::Resettable for HW_STAT_ACK_INT_SPEC {
const RESET_VALUE: u32 = 0;
}
28 changes: 28 additions & 0 deletions esp32/src/wifi/hw_stat_block_err.rs
Original file line number Diff line number Diff line change
@@ -0,0 +1,28 @@
#[doc = "Register `HW_STAT_BLOCK_ERR` reader"]
pub type R = crate::R<HW_STAT_BLOCK_ERR_SPEC>;
#[doc = "Register `HW_STAT_BLOCK_ERR` writer"]
pub type W = crate::W<HW_STAT_BLOCK_ERR_SPEC>;
#[cfg(feature = "impl-register-debug")]
impl core::fmt::Debug for R {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
write!(f, "{}", self.bits())
}
}
impl W {}
#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`hw_stat_block_err::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hw_stat_block_err::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct HW_STAT_BLOCK_ERR_SPEC;
impl crate::RegisterSpec for HW_STAT_BLOCK_ERR_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [`hw_stat_block_err::R`](R) reader structure"]
impl crate::Readable for HW_STAT_BLOCK_ERR_SPEC {}
#[doc = "`write(|w| ..)` method takes [`hw_stat_block_err::W`](W) writer structure"]
impl crate::Writable for HW_STAT_BLOCK_ERR_SPEC {
type Safety = crate::Unsafe;
const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
}
#[doc = "`reset()` method sets HW_STAT_BLOCK_ERR to value 0"]
impl crate::Resettable for HW_STAT_BLOCK_ERR_SPEC {
const RESET_VALUE: u32 = 0;
}
28 changes: 28 additions & 0 deletions esp32/src/wifi/hw_stat_cts_int.rs
Original file line number Diff line number Diff line change
@@ -0,0 +1,28 @@
#[doc = "Register `HW_STAT_CTS_INT` reader"]
pub type R = crate::R<HW_STAT_CTS_INT_SPEC>;
#[doc = "Register `HW_STAT_CTS_INT` writer"]
pub type W = crate::W<HW_STAT_CTS_INT_SPEC>;
#[cfg(feature = "impl-register-debug")]
impl core::fmt::Debug for R {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
write!(f, "{}", self.bits())
}
}
impl W {}
#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`hw_stat_cts_int::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hw_stat_cts_int::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct HW_STAT_CTS_INT_SPEC;
impl crate::RegisterSpec for HW_STAT_CTS_INT_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [`hw_stat_cts_int::R`](R) reader structure"]
impl crate::Readable for HW_STAT_CTS_INT_SPEC {}
#[doc = "`write(|w| ..)` method takes [`hw_stat_cts_int::W`](W) writer structure"]
impl crate::Writable for HW_STAT_CTS_INT_SPEC {
type Safety = crate::Unsafe;
const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
}
#[doc = "`reset()` method sets HW_STAT_CTS_INT to value 0"]
impl crate::Resettable for HW_STAT_CTS_INT_SPEC {
const RESET_VALUE: u32 = 0;
}
28 changes: 28 additions & 0 deletions esp32/src/wifi/hw_stat_rifs_int.rs
Original file line number Diff line number Diff line change
@@ -0,0 +1,28 @@
#[doc = "Register `HW_STAT_RIFS_INT` reader"]
pub type R = crate::R<HW_STAT_RIFS_INT_SPEC>;
#[doc = "Register `HW_STAT_RIFS_INT` writer"]
pub type W = crate::W<HW_STAT_RIFS_INT_SPEC>;
#[cfg(feature = "impl-register-debug")]
impl core::fmt::Debug for R {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
write!(f, "{}", self.bits())
}
}
impl W {}
#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`hw_stat_rifs_int::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hw_stat_rifs_int::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct HW_STAT_RIFS_INT_SPEC;
impl crate::RegisterSpec for HW_STAT_RIFS_INT_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [`hw_stat_rifs_int::R`](R) reader structure"]
impl crate::Readable for HW_STAT_RIFS_INT_SPEC {}
#[doc = "`write(|w| ..)` method takes [`hw_stat_rifs_int::W`](W) writer structure"]
impl crate::Writable for HW_STAT_RIFS_INT_SPEC {
type Safety = crate::Unsafe;
const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
}
#[doc = "`reset()` method sets HW_STAT_RIFS_INT to value 0"]
impl crate::Resettable for HW_STAT_RIFS_INT_SPEC {
const RESET_VALUE: u32 = 0;
}
28 changes: 28 additions & 0 deletions esp32/src/wifi/hw_stat_rts_int.rs
Original file line number Diff line number Diff line change
@@ -0,0 +1,28 @@
#[doc = "Register `HW_STAT_RTS_INT` reader"]
pub type R = crate::R<HW_STAT_RTS_INT_SPEC>;
#[doc = "Register `HW_STAT_RTS_INT` writer"]
pub type W = crate::W<HW_STAT_RTS_INT_SPEC>;
#[cfg(feature = "impl-register-debug")]
impl core::fmt::Debug for R {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
write!(f, "{}", self.bits())
}
}
impl W {}
#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`hw_stat_rts_int::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hw_stat_rts_int::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct HW_STAT_RTS_INT_SPEC;
impl crate::RegisterSpec for HW_STAT_RTS_INT_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [`hw_stat_rts_int::R`](R) reader structure"]
impl crate::Readable for HW_STAT_RTS_INT_SPEC {}
#[doc = "`write(|w| ..)` method takes [`hw_stat_rts_int::W`](W) writer structure"]
impl crate::Writable for HW_STAT_RTS_INT_SPEC {
type Safety = crate::Unsafe;
const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
}
#[doc = "`reset()` method sets HW_STAT_RTS_INT to value 0"]
impl crate::Resettable for HW_STAT_RTS_INT_SPEC {
const RESET_VALUE: u32 = 0;
}

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