fix mcpwm clusters (#219)

esp-rs · Mar 30, 2024 · bc355d6 · bc355d6
1 parent 5a50512
commit bc355d6
Show file tree

Hide file tree

Showing 32 changed files with 1,324 additions and 1,520 deletions.
diff --git a/common_patches/mcpwm_collect.yaml b/common_patches/mcpwm_collect.yaml
@@ -24,13 +24,19 @@ _cluster:
         description: Actions triggered by events on PWMx%s
 
     GEN?_STMP_CFG:
-      _strip: GEN?_
+      _strip:
+        - GEN?_
+        - CMPR?_
       description: Transfer status and update method for time stamp registers A and B
     GEN?_TSTMP_A:
-      _strip: GEN?_
+      _strip:
+        - GEN?_
+        - CMPR?_
       description: Shadow register for register A.
     GEN?_TSTMP_B:
-      _strip: GEN?_
+      _strip:
+        - GEN?_
+        - CMPR?_
       description: Shadow register for register B.
     GEN?_CFG0:
       _strip: GEN?_
@@ -42,25 +48,39 @@ _cluster:
     GEN?_B:
       description: Actions triggered by events on PWMxB
     DT?_CFG:
-      _strip: DT?_
+      _strip:
+        - DT?_
+        - DB?_
       description: Dead time type selection and configuration
     DT?_FED_CFG:
-      _strip: DT?_
+      _strip:
+        - DT?_
+        - DB?_
       description: Shadow register for falling edge delay (FED).
     DT?_RED_CFG:
-      _strip: DT?_
+      _strip:
+        - DT?_
+        - DB?_
       description: Shadow register for rising edge delay (RED).
     CARRIER?_CFG:
-      _strip: CARRIER?_
+      _strip:
+        - CARRIER?_
+        - CHOPPER?_
       description: Carrier enable and configuratoin
     FH?_CFG0:
-      _strip: FH?_
+      _strip:
+        - FH?_
+        - TZ?_
       description: Actions on PWM0A and PWM0B trip events
     FH?_CFG1:
-      _strip: FH?_
+      _strip:
+        - FH?_
+        - TZ?_
       description: Software triggers for fault handler actions
     FH?_STATUS:
-      _strip: FH?_
+      _strip:
+        - FH?_
+        - TZ?_
       description: Status of fault events.
 
 _array:

diff --git a/esp32c6/src/mcpwm0/ch/carrier_cfg.rs b/esp32c6/src/mcpwm0/ch/carrier_cfg.rs
@@ -2,87 +2,72 @@
 pub type R = crate::R<CARRIER_CFG_SPEC>;
 #[doc = "Register `CARRIER_CFG` writer"]
 pub type W = crate::W<CARRIER_CFG_SPEC>;
-#[doc = "Field `CHOPPER0_EN` reader - When set, carrier0 function is enabled. When cleared, carrier0 is bypassed"]
-pub type CHOPPER0_EN_R = crate::BitReader;
-#[doc = "Field `CHOPPER0_EN` writer - When set, carrier0 function is enabled. When cleared, carrier0 is bypassed"]
-pub type CHOPPER0_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
-#[doc = "Field `CHOPPER0_PRESCALE` reader - PWM carrier0 clock (PC_clk) prescale value. Period of PC_clk = period of PWM_clk * (PWM_CARRIER0_PRESCALE + 1)"]
-pub type CHOPPER0_PRESCALE_R = crate::FieldReader;
-#[doc = "Field `CHOPPER0_PRESCALE` writer - PWM carrier0 clock (PC_clk) prescale value. Period of PC_clk = period of PWM_clk * (PWM_CARRIER0_PRESCALE + 1)"]
-pub type CHOPPER0_PRESCALE_W<'a, REG> = crate::FieldWriter<'a, REG, 4>;
-#[doc = "Field `CHOPPER0_DUTY` reader - carrier duty selection. Duty = PWM_CARRIER0_DUTY / 8"]
-pub type CHOPPER0_DUTY_R = crate::FieldReader;
-#[doc = "Field `CHOPPER0_DUTY` writer - carrier duty selection. Duty = PWM_CARRIER0_DUTY / 8"]
-pub type CHOPPER0_DUTY_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
-#[doc = "Field `CHOPPER0_OSHTWTH` reader - width of the first pulse in number of periods of the carrier"]
-pub type CHOPPER0_OSHTWTH_R = crate::FieldReader;
-#[doc = "Field `CHOPPER0_OSHTWTH` writer - width of the first pulse in number of periods of the carrier"]
-pub type CHOPPER0_OSHTWTH_W<'a, REG> = crate::FieldWriter<'a, REG, 4>;
-#[doc = "Field `CHOPPER0_OUT_INVERT` reader - when set, invert the output of PWM0A and PWM0B for this submodule"]
-pub type CHOPPER0_OUT_INVERT_R = crate::BitReader;
-#[doc = "Field `CHOPPER0_OUT_INVERT` writer - when set, invert the output of PWM0A and PWM0B for this submodule"]
-pub type CHOPPER0_OUT_INVERT_W<'a, REG> = crate::BitWriter<'a, REG>;
-#[doc = "Field `CHOPPER0_IN_INVERT` reader - when set, invert the input of PWM0A and PWM0B for this submodule"]
-pub type CHOPPER0_IN_INVERT_R = crate::BitReader;
-#[doc = "Field `CHOPPER0_IN_INVERT` writer - when set, invert the input of PWM0A and PWM0B for this submodule"]
-pub type CHOPPER0_IN_INVERT_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `EN` reader - When set, carrier0 function is enabled. When cleared, carrier0 is bypassed"]
+pub type EN_R = crate::BitReader;
+#[doc = "Field `EN` writer - When set, carrier0 function is enabled. When cleared, carrier0 is bypassed"]
+pub type EN_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `PRESCALE` reader - PWM carrier0 clock (PC_clk) prescale value. Period of PC_clk = period of PWM_clk * (PWM_CARRIER0_PRESCALE + 1)"]
+pub type PRESCALE_R = crate::FieldReader;
+#[doc = "Field `PRESCALE` writer - PWM carrier0 clock (PC_clk) prescale value. Period of PC_clk = period of PWM_clk * (PWM_CARRIER0_PRESCALE + 1)"]
+pub type PRESCALE_W<'a, REG> = crate::FieldWriter<'a, REG, 4>;
+#[doc = "Field `DUTY` reader - carrier duty selection. Duty = PWM_CARRIER0_DUTY / 8"]
+pub type DUTY_R = crate::FieldReader;
+#[doc = "Field `DUTY` writer - carrier duty selection. Duty = PWM_CARRIER0_DUTY / 8"]
+pub type DUTY_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
+#[doc = "Field `OSHTWTH` reader - width of the first pulse in number of periods of the carrier"]
+pub type OSHTWTH_R = crate::FieldReader;
+#[doc = "Field `OSHTWTH` writer - width of the first pulse in number of periods of the carrier"]
+pub type OSHTWTH_W<'a, REG> = crate::FieldWriter<'a, REG, 4>;
+#[doc = "Field `OUT_INVERT` reader - when set, invert the output of PWM0A and PWM0B for this submodule"]
+pub type OUT_INVERT_R = crate::BitReader;
+#[doc = "Field `OUT_INVERT` writer - when set, invert the output of PWM0A and PWM0B for this submodule"]
+pub type OUT_INVERT_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `IN_INVERT` reader - when set, invert the input of PWM0A and PWM0B for this submodule"]
+pub type IN_INVERT_R = crate::BitReader;
+#[doc = "Field `IN_INVERT` writer - when set, invert the input of PWM0A and PWM0B for this submodule"]
+pub type IN_INVERT_W<'a, REG> = crate::BitWriter<'a, REG>;
 impl R {
     #[doc = "Bit 0 - When set, carrier0 function is enabled. When cleared, carrier0 is bypassed"]
     #[inline(always)]
-    pub fn chopper0_en(&self) -> CHOPPER0_EN_R {
-        CHOPPER0_EN_R::new((self.bits & 1) != 0)
+    pub fn en(&self) -> EN_R {
+        EN_R::new((self.bits & 1) != 0)
     }
     #[doc = "Bits 1:4 - PWM carrier0 clock (PC_clk) prescale value. Period of PC_clk = period of PWM_clk * (PWM_CARRIER0_PRESCALE + 1)"]
     #[inline(always)]
-    pub fn chopper0_prescale(&self) -> CHOPPER0_PRESCALE_R {
-        CHOPPER0_PRESCALE_R::new(((self.bits >> 1) & 0x0f) as u8)
+    pub fn prescale(&self) -> PRESCALE_R {
+        PRESCALE_R::new(((self.bits >> 1) & 0x0f) as u8)
     }
     #[doc = "Bits 5:7 - carrier duty selection. Duty = PWM_CARRIER0_DUTY / 8"]
     #[inline(always)]
-    pub fn chopper0_duty(&self) -> CHOPPER0_DUTY_R {
-        CHOPPER0_DUTY_R::new(((self.bits >> 5) & 7) as u8)
+    pub fn duty(&self) -> DUTY_R {
+        DUTY_R::new(((self.bits >> 5) & 7) as u8)
     }
     #[doc = "Bits 8:11 - width of the first pulse in number of periods of the carrier"]
     #[inline(always)]
-    pub fn chopper0_oshtwth(&self) -> CHOPPER0_OSHTWTH_R {
-        CHOPPER0_OSHTWTH_R::new(((self.bits >> 8) & 0x0f) as u8)
+    pub fn oshtwth(&self) -> OSHTWTH_R {
+        OSHTWTH_R::new(((self.bits >> 8) & 0x0f) as u8)
     }
     #[doc = "Bit 12 - when set, invert the output of PWM0A and PWM0B for this submodule"]
     #[inline(always)]
-    pub fn chopper0_out_invert(&self) -> CHOPPER0_OUT_INVERT_R {
-        CHOPPER0_OUT_INVERT_R::new(((self.bits >> 12) & 1) != 0)
+    pub fn out_invert(&self) -> OUT_INVERT_R {
+        OUT_INVERT_R::new(((self.bits >> 12) & 1) != 0)
     }
     #[doc = "Bit 13 - when set, invert the input of PWM0A and PWM0B for this submodule"]
     #[inline(always)]
-    pub fn chopper0_in_invert(&self) -> CHOPPER0_IN_INVERT_R {
-        CHOPPER0_IN_INVERT_R::new(((self.bits >> 13) & 1) != 0)
+    pub fn in_invert(&self) -> IN_INVERT_R {
+        IN_INVERT_R::new(((self.bits >> 13) & 1) != 0)
     }
 }
 #[cfg(feature = "impl-register-debug")]
 impl core::fmt::Debug for R {
     fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
         f.debug_struct("CARRIER_CFG")
-            .field("chopper0_en", &format_args!("{}", self.chopper0_en().bit()))
-            .field(
-                "chopper0_prescale",
-                &format_args!("{}", self.chopper0_prescale().bits()),
-            )
-            .field(
-                "chopper0_duty",
-                &format_args!("{}", self.chopper0_duty().bits()),
-            )
-            .field(
-                "chopper0_oshtwth",
-                &format_args!("{}", self.chopper0_oshtwth().bits()),
-            )
-            .field(
-                "chopper0_out_invert",
-                &format_args!("{}", self.chopper0_out_invert().bit()),
-            )
-            .field(
-                "chopper0_in_invert",
-                &format_args!("{}", self.chopper0_in_invert().bit()),
-            )
+            .field("en", &format_args!("{}", self.en().bit()))
+            .field("prescale", &format_args!("{}", self.prescale().bits()))
+            .field("duty", &format_args!("{}", self.duty().bits()))
+            .field("oshtwth", &format_args!("{}", self.oshtwth().bits()))
+            .field("out_invert", &format_args!("{}", self.out_invert().bit()))
+            .field("in_invert", &format_args!("{}", self.in_invert().bit()))
             .finish()
     }
 }
@@ -96,38 +81,38 @@ impl W {
     #[doc = "Bit 0 - When set, carrier0 function is enabled. When cleared, carrier0 is bypassed"]
     #[inline(always)]
     #[must_use]
-    pub fn chopper0_en(&mut self) -> CHOPPER0_EN_W<CARRIER_CFG_SPEC> {
-        CHOPPER0_EN_W::new(self, 0)
+    pub fn en(&mut self) -> EN_W<CARRIER_CFG_SPEC> {
+        EN_W::new(self, 0)
     }
     #[doc = "Bits 1:4 - PWM carrier0 clock (PC_clk) prescale value. Period of PC_clk = period of PWM_clk * (PWM_CARRIER0_PRESCALE + 1)"]
     #[inline(always)]
     #[must_use]
-    pub fn chopper0_prescale(&mut self) -> CHOPPER0_PRESCALE_W<CARRIER_CFG_SPEC> {
-        CHOPPER0_PRESCALE_W::new(self, 1)
+    pub fn prescale(&mut self) -> PRESCALE_W<CARRIER_CFG_SPEC> {
+        PRESCALE_W::new(self, 1)
     }
     #[doc = "Bits 5:7 - carrier duty selection. Duty = PWM_CARRIER0_DUTY / 8"]
     #[inline(always)]
     #[must_use]
-    pub fn chopper0_duty(&mut self) -> CHOPPER0_DUTY_W<CARRIER_CFG_SPEC> {
-        CHOPPER0_DUTY_W::new(self, 5)
+    pub fn duty(&mut self) -> DUTY_W<CARRIER_CFG_SPEC> {
+        DUTY_W::new(self, 5)
     }
     #[doc = "Bits 8:11 - width of the first pulse in number of periods of the carrier"]
     #[inline(always)]
     #[must_use]
-    pub fn chopper0_oshtwth(&mut self) -> CHOPPER0_OSHTWTH_W<CARRIER_CFG_SPEC> {
-        CHOPPER0_OSHTWTH_W::new(self, 8)
+    pub fn oshtwth(&mut self) -> OSHTWTH_W<CARRIER_CFG_SPEC> {
+        OSHTWTH_W::new(self, 8)
     }
     #[doc = "Bit 12 - when set, invert the output of PWM0A and PWM0B for this submodule"]
     #[inline(always)]
     #[must_use]
-    pub fn chopper0_out_invert(&mut self) -> CHOPPER0_OUT_INVERT_W<CARRIER_CFG_SPEC> {
-        CHOPPER0_OUT_INVERT_W::new(self, 12)
+    pub fn out_invert(&mut self) -> OUT_INVERT_W<CARRIER_CFG_SPEC> {
+        OUT_INVERT_W::new(self, 12)
     }
     #[doc = "Bit 13 - when set, invert the input of PWM0A and PWM0B for this submodule"]
     #[inline(always)]
     #[must_use]
-    pub fn chopper0_in_invert(&mut self) -> CHOPPER0_IN_INVERT_W<CARRIER_CFG_SPEC> {
-        CHOPPER0_IN_INVERT_W::new(self, 13)
+    pub fn in_invert(&mut self) -> IN_INVERT_W<CARRIER_CFG_SPEC> {
+        IN_INVERT_W::new(self, 13)
     }
 }
 #[doc = "Carrier enable and configuratoin\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`carrier_cfg::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`carrier_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]