Add SVD and generate PAC

esp32p4/build.rs

@@ -0,0 +1,17 @@
+#![doc = r" Builder file for Peripheral access crate generated by svd2rust tool"]
+use std::env;
+use std::fs::File;
+use std::io::Write;
+use std::path::PathBuf;
+fn main() {
+    if env::var_os("CARGO_FEATURE_RT").is_some() {
+        let out = &PathBuf::from(env::var_os("OUT_DIR").unwrap());
+        File::create(out.join("device.x"))
+            .unwrap()
+            .write_all(include_bytes!("device.x"))
+            .unwrap();
+        println!("cargo:rustc-link-search={}", out.display());
+        println!("cargo:rerun-if-changed=device.x");
+    }
+    println!("cargo:rerun-if-changed=build.rs");
+}

esp32p4/device.x

@@ -0,0 +1,80 @@
+PROVIDE(LP_WDT = DefaultHandler);
+PROVIDE(LP_TIMER0 = DefaultHandler);
+PROVIDE(LP_TIMER1 = DefaultHandler);
+PROVIDE(PMU0 = DefaultHandler);
+PROVIDE(PMU1 = DefaultHandler);
+PROVIDE(LP_ANA = DefaultHandler);
+PROVIDE(LP_ADC = DefaultHandler);
+PROVIDE(LP_GPIO = DefaultHandler);
+PROVIDE(LP_I2C0 = DefaultHandler);
+PROVIDE(LP_I2S0 = DefaultHandler);
+PROVIDE(LP_TOUCH = DefaultHandler);
+PROVIDE(LP_TSENS = DefaultHandler);
+PROVIDE(LP_UART = DefaultHandler);
+PROVIDE(LP_SYS = DefaultHandler);
+PROVIDE(LP_HUK = DefaultHandler);
+PROVIDE(USB_DEVICE = DefaultHandler);
+PROVIDE(DMA = DefaultHandler);
+PROVIDE(SPI2 = DefaultHandler);
+PROVIDE(SPI3 = DefaultHandler);
+PROVIDE(I2S0 = DefaultHandler);
+PROVIDE(I2S1 = DefaultHandler);
+PROVIDE(I2S2 = DefaultHandler);
+PROVIDE(UHCI0 = DefaultHandler);
+PROVIDE(UART0 = DefaultHandler);
+PROVIDE(PWM0 = DefaultHandler);
+PROVIDE(PWM1 = DefaultHandler);
+PROVIDE(TWAI0 = DefaultHandler);
+PROVIDE(TWAI1 = DefaultHandler);
+PROVIDE(TWAI2 = DefaultHandler);
+PROVIDE(RMT = DefaultHandler);
+PROVIDE(I2C0 = DefaultHandler);
+PROVIDE(I2C1 = DefaultHandler);
+PROVIDE(TG0_T0 = DefaultHandler);
+PROVIDE(TG0_T1 = DefaultHandler);
+PROVIDE(TG0_WDT = DefaultHandler);
+PROVIDE(TG1_T0 = DefaultHandler);
+PROVIDE(TG1_T1 = DefaultHandler);
+PROVIDE(TG1_WDT = DefaultHandler);
+PROVIDE(LEDC = DefaultHandler);
+PROVIDE(SYSTIMER_TARGET0 = DefaultHandler);
+PROVIDE(SYSTIMER_TARGET1 = DefaultHandler);
+PROVIDE(SYSTIMER_TARGET2 = DefaultHandler);
+PROVIDE(RSA = DefaultHandler);
+PROVIDE(AES = DefaultHandler);
+PROVIDE(SHA = DefaultHandler);
+PROVIDE(ECC = DefaultHandler);
+PROVIDE(GPIO_INT0 = DefaultHandler);
+PROVIDE(GPIO_INT1 = DefaultHandler);
+PROVIDE(GPIO_INT2 = DefaultHandler);
+PROVIDE(GPIO_INT3 = DefaultHandler);
+PROVIDE(GPIO_PAD_COMP = DefaultHandler);
+PROVIDE(CACHE = DefaultHandler);
+PROVIDE(CSI_BRIDGE = DefaultHandler);
+PROVIDE(DSI_BRIDGE = DefaultHandler);
+PROVIDE(CSI = DefaultHandler);
+PROVIDE(DSI = DefaultHandler);
+PROVIDE(JPEG = DefaultHandler);
+PROVIDE(PPA = DefaultHandler);
+PROVIDE(ISP = DefaultHandler);
+PROVIDE(I3C = DefaultHandler);
+PROVIDE(I3C_SLV = DefaultHandler);
+PROVIDE(HP_SYS = DefaultHandler);
+PROVIDE(PCNT = DefaultHandler);
+PROVIDE(PAU = DefaultHandler);
+PROVIDE(PARLIO_RX = DefaultHandler);
+PROVIDE(PARLIO_TX = DefaultHandler);
+PROVIDE(H264_DMA2D_OUT_CH0 = DefaultHandler);
+PROVIDE(H264_DMA2D_OUT_CH1 = DefaultHandler);
+PROVIDE(H264_DMA2D_OUT_CH2 = DefaultHandler);
+PROVIDE(H264_DMA2D_OUT_CH3 = DefaultHandler);
+PROVIDE(H264_DMA2D_OUT_CH4 = DefaultHandler);
+PROVIDE(H264_DMA2D_IN_CH0 = DefaultHandler);
+PROVIDE(H264_DMA2D_IN_CH1 = DefaultHandler);
+PROVIDE(H264_DMA2D_IN_CH2 = DefaultHandler);
+PROVIDE(H264_DMA2D_IN_CH3 = DefaultHandler);
+PROVIDE(H264_DMA2D_IN_CH4 = DefaultHandler);
+PROVIDE(H264_DMA2D_IN_CH5 = DefaultHandler);
+PROVIDE(H264_REG = DefaultHandler);
+PROVIDE(ASSIST_DEBUG = DefaultHandler);
+

esp32p4/src/adc/arb_ctrl.rs

@@ -0,0 +1,199 @@
+#[doc = "Register `ARB_CTRL` reader"]
+pub type R = crate::R<ARB_CTRL_SPEC>;
+#[doc = "Register `ARB_CTRL` writer"]
+pub type W = crate::W<ARB_CTRL_SPEC>;
+#[doc = "Field `ARB_APB_FORCE` reader - adc2 arbiter force to enableapb controller"]
+pub type ARB_APB_FORCE_R = crate::BitReader;
+#[doc = "Field `ARB_APB_FORCE` writer - adc2 arbiter force to enableapb controller"]
+pub type ARB_APB_FORCE_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `ARB_RTC_FORCE` reader - adc2 arbiter force to enable rtc controller"]
+pub type ARB_RTC_FORCE_R = crate::BitReader;
+#[doc = "Field `ARB_RTC_FORCE` writer - adc2 arbiter force to enable rtc controller"]
+pub type ARB_RTC_FORCE_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `ARB_WIFI_FORCE` reader - adc2 arbiter force to enable wifi controller"]
+pub type ARB_WIFI_FORCE_R = crate::BitReader;
+#[doc = "Field `ARB_WIFI_FORCE` writer - adc2 arbiter force to enable wifi controller"]
+pub type ARB_WIFI_FORCE_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `ARB_GRANT_FORCE` reader - adc2 arbiter force grant"]
+pub type ARB_GRANT_FORCE_R = crate::BitReader;
+#[doc = "Field `ARB_GRANT_FORCE` writer - adc2 arbiter force grant"]
+pub type ARB_GRANT_FORCE_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `ARB_APB_PRIORITY` reader - Set adc2 arbiterapb priority"]
+pub type ARB_APB_PRIORITY_R = crate::FieldReader;
+#[doc = "Field `ARB_APB_PRIORITY` writer - Set adc2 arbiterapb priority"]
+pub type ARB_APB_PRIORITY_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
+#[doc = "Field `ARB_RTC_PRIORITY` reader - Set adc2 arbiter rtc priority"]
+pub type ARB_RTC_PRIORITY_R = crate::FieldReader;
+#[doc = "Field `ARB_RTC_PRIORITY` writer - Set adc2 arbiter rtc priority"]
+pub type ARB_RTC_PRIORITY_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
+#[doc = "Field `ARB_WIFI_PRIORITY` reader - Set adc2 arbiter wifi priority"]
+pub type ARB_WIFI_PRIORITY_R = crate::FieldReader;
+#[doc = "Field `ARB_WIFI_PRIORITY` writer - Set adc2 arbiter wifi priority"]
+pub type ARB_WIFI_PRIORITY_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
+#[doc = "Field `ARB_FIX_PRIORITY` reader - adc2 arbiter uses fixed priority"]
+pub type ARB_FIX_PRIORITY_R = crate::BitReader;
+#[doc = "Field `ARB_FIX_PRIORITY` writer - adc2 arbiter uses fixed priority"]
+pub type ARB_FIX_PRIORITY_W<'a, REG> = crate::BitWriter<'a, REG>;
+impl R {
+    #[doc = "Bit 2 - adc2 arbiter force to enableapb controller"]
+    #[inline(always)]
+    pub fn arb_apb_force(&self) -> ARB_APB_FORCE_R {
+        ARB_APB_FORCE_R::new(((self.bits >> 2) & 1) != 0)
+    }
+    #[doc = "Bit 3 - adc2 arbiter force to enable rtc controller"]
+    #[inline(always)]
+    pub fn arb_rtc_force(&self) -> ARB_RTC_FORCE_R {
+        ARB_RTC_FORCE_R::new(((self.bits >> 3) & 1) != 0)
+    }
+    #[doc = "Bit 4 - adc2 arbiter force to enable wifi controller"]
+    #[inline(always)]
+    pub fn arb_wifi_force(&self) -> ARB_WIFI_FORCE_R {
+        ARB_WIFI_FORCE_R::new(((self.bits >> 4) & 1) != 0)
+    }
+    #[doc = "Bit 5 - adc2 arbiter force grant"]
+    #[inline(always)]
+    pub fn arb_grant_force(&self) -> ARB_GRANT_FORCE_R {
+        ARB_GRANT_FORCE_R::new(((self.bits >> 5) & 1) != 0)
+    }
+    #[doc = "Bits 6:7 - Set adc2 arbiterapb priority"]
+    #[inline(always)]
+    pub fn arb_apb_priority(&self) -> ARB_APB_PRIORITY_R {
+        ARB_APB_PRIORITY_R::new(((self.bits >> 6) & 3) as u8)
+    }
+    #[doc = "Bits 8:9 - Set adc2 arbiter rtc priority"]
+    #[inline(always)]
+    pub fn arb_rtc_priority(&self) -> ARB_RTC_PRIORITY_R {
+        ARB_RTC_PRIORITY_R::new(((self.bits >> 8) & 3) as u8)
+    }
+    #[doc = "Bits 10:11 - Set adc2 arbiter wifi priority"]
+    #[inline(always)]
+    pub fn arb_wifi_priority(&self) -> ARB_WIFI_PRIORITY_R {
+        ARB_WIFI_PRIORITY_R::new(((self.bits >> 10) & 3) as u8)
+    }
+    #[doc = "Bit 12 - adc2 arbiter uses fixed priority"]
+    #[inline(always)]
+    pub fn arb_fix_priority(&self) -> ARB_FIX_PRIORITY_R {
+        ARB_FIX_PRIORITY_R::new(((self.bits >> 12) & 1) != 0)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("ARB_CTRL")
+            .field(
+                "arb_apb_force",
+                &format_args!("{}", self.arb_apb_force().bit()),
+            )
+            .field(
+                "arb_rtc_force",
+                &format_args!("{}", self.arb_rtc_force().bit()),
+            )
+            .field(
+                "arb_wifi_force",
+                &format_args!("{}", self.arb_wifi_force().bit()),
+            )
+            .field(
+                "arb_grant_force",
+                &format_args!("{}", self.arb_grant_force().bit()),
+            )
+            .field(
+                "arb_apb_priority",
+                &format_args!("{}", self.arb_apb_priority().bits()),
+            )
+            .field(
+                "arb_rtc_priority",
+                &format_args!("{}", self.arb_rtc_priority().bits()),
+            )
+            .field(
+                "arb_wifi_priority",
+                &format_args!("{}", self.arb_wifi_priority().bits()),
+            )
+            .field(
+                "arb_fix_priority",
+                &format_args!("{}", self.arb_fix_priority().bit()),
+            )
+            .finish()
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for crate::generic::Reg<ARB_CTRL_SPEC> {
+    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
+        core::fmt::Debug::fmt(&self.read(), f)
+    }
+}
+impl W {
+    #[doc = "Bit 2 - adc2 arbiter force to enableapb controller"]
+    #[inline(always)]
+    #[must_use]
+    pub fn arb_apb_force(&mut self) -> ARB_APB_FORCE_W<ARB_CTRL_SPEC> {
+        ARB_APB_FORCE_W::new(self, 2)
+    }
+    #[doc = "Bit 3 - adc2 arbiter force to enable rtc controller"]
+    #[inline(always)]
+    #[must_use]
+    pub fn arb_rtc_force(&mut self) -> ARB_RTC_FORCE_W<ARB_CTRL_SPEC> {
+        ARB_RTC_FORCE_W::new(self, 3)
+    }
+    #[doc = "Bit 4 - adc2 arbiter force to enable wifi controller"]
+    #[inline(always)]
+    #[must_use]
+    pub fn arb_wifi_force(&mut self) -> ARB_WIFI_FORCE_W<ARB_CTRL_SPEC> {
+        ARB_WIFI_FORCE_W::new(self, 4)
+    }
+    #[doc = "Bit 5 - adc2 arbiter force grant"]
+    #[inline(always)]
+    #[must_use]
+    pub fn arb_grant_force(&mut self) -> ARB_GRANT_FORCE_W<ARB_CTRL_SPEC> {
+        ARB_GRANT_FORCE_W::new(self, 5)
+    }
+    #[doc = "Bits 6:7 - Set adc2 arbiterapb priority"]
+    #[inline(always)]
+    #[must_use]
+    pub fn arb_apb_priority(&mut self) -> ARB_APB_PRIORITY_W<ARB_CTRL_SPEC> {
+        ARB_APB_PRIORITY_W::new(self, 6)
+    }
+    #[doc = "Bits 8:9 - Set adc2 arbiter rtc priority"]
+    #[inline(always)]
+    #[must_use]
+    pub fn arb_rtc_priority(&mut self) -> ARB_RTC_PRIORITY_W<ARB_CTRL_SPEC> {
+        ARB_RTC_PRIORITY_W::new(self, 8)
+    }
+    #[doc = "Bits 10:11 - Set adc2 arbiter wifi priority"]
+    #[inline(always)]
+    #[must_use]
+    pub fn arb_wifi_priority(&mut self) -> ARB_WIFI_PRIORITY_W<ARB_CTRL_SPEC> {
+        ARB_WIFI_PRIORITY_W::new(self, 10)
+    }
+    #[doc = "Bit 12 - adc2 arbiter uses fixed priority"]
+    #[inline(always)]
+    #[must_use]
+    pub fn arb_fix_priority(&mut self) -> ARB_FIX_PRIORITY_W<ARB_CTRL_SPEC> {
+        ARB_FIX_PRIORITY_W::new(self, 12)
+    }
+    #[doc = r" Writes raw bits to the register."]
+    #[doc = r""]
+    #[doc = r" # Safety"]
+    #[doc = r""]
+    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+}
+#[doc = "Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`arb_ctrl::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`arb_ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct ARB_CTRL_SPEC;
+impl crate::RegisterSpec for ARB_CTRL_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`arb_ctrl::R`](R) reader structure"]
+impl crate::Readable for ARB_CTRL_SPEC {}
+#[doc = "`write(|w| ..)` method takes [`arb_ctrl::W`](W) writer structure"]
+impl crate::Writable for ARB_CTRL_SPEC {
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets ARB_CTRL to value 0x0900"]
+impl crate::Resettable for ARB_CTRL_SPEC {
+    const RESET_VALUE: Self::Ux = 0x0900;
+}

esp32p4/src/adc/cali.rs

@@ -0,0 +1,63 @@
+#[doc = "Register `CALI` reader"]
+pub type R = crate::R<CALI_SPEC>;
+#[doc = "Register `CALI` writer"]
+pub type W = crate::W<CALI_SPEC>;
+#[doc = "Field `CFG` reader - need_des"]
+pub type CFG_R = crate::FieldReader<u32>;
+#[doc = "Field `CFG` writer - need_des"]
+pub type CFG_W<'a, REG> = crate::FieldWriter<'a, REG, 17, u32>;
+impl R {
+    #[doc = "Bits 0:16 - need_des"]
+    #[inline(always)]
+    pub fn cfg(&self) -> CFG_R {
+        CFG_R::new(self.bits & 0x0001_ffff)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("CALI")
+            .field("cfg", &format_args!("{}", self.cfg().bits()))
+            .finish()
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for crate::generic::Reg<CALI_SPEC> {
+    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
+        core::fmt::Debug::fmt(&self.read(), f)
+    }
+}
+impl W {
+    #[doc = "Bits 0:16 - need_des"]
+    #[inline(always)]
+    #[must_use]
+    pub fn cfg(&mut self) -> CFG_W<CALI_SPEC> {
+        CFG_W::new(self, 0)
+    }
+    #[doc = r" Writes raw bits to the register."]
+    #[doc = r""]
+    #[doc = r" # Safety"]
+    #[doc = r""]
+    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+}
+#[doc = "Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cali::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cali::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct CALI_SPEC;
+impl crate::RegisterSpec for CALI_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`cali::R`](R) reader structure"]
+impl crate::Readable for CALI_SPEC {}
+#[doc = "`write(|w| ..)` method takes [`cali::W`](W) writer structure"]
+impl crate::Writable for CALI_SPEC {
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets CALI to value 0x8000"]
+impl crate::Resettable for CALI_SPEC {
+    const RESET_VALUE: Self::Ux = 0x8000;
+}