fix flake errors

efabless · Jan 27, 2025 · 2c3ec54 · 2c3ec54
1 parent 5b7e513
commit 2c3ec54
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Showing 2 changed files with 2 additions and 6 deletions.
diff --git a/cocotb/caravel_cocotb/scripts/verify_cocotb/RunFlow.py b/cocotb/caravel_cocotb/scripts/verify_cocotb/RunFlow.py
@@ -146,7 +146,7 @@ def set_paths(self, design_info):
                 design_info["USER_PROJECT_ROOT"],
                 SIM_PATH,
             )
-        elif "CHEETAH_ROOT" in design_info: 
+        elif "CHEETAH_ROOT" in design_info:
             Paths = namedtuple(
                 "Paths",
                 "CHEETAH_ROOT MCW_ROOT PDK_ROOT PDK RUN_PATH VERILOG_PATH FIRMWARE_PATH USER_PROJECT_ROOT SIM_PATH",
@@ -170,10 +170,6 @@ def set_paths(self, design_info):
                 design_info["USER_PROJECT_ROOT"],
                 SIM_PATH,
             )
-
-
-
-
 
     def set_cpu_type(self):
         def_h_file = f"{self.paths.FIRMWARE_PATH}/defs.h"

diff --git a/cocotb/caravel_cocotb/scripts/verify_cocotb/Test.py b/cocotb/caravel_cocotb/scripts/verify_cocotb/Test.py
@@ -78,7 +78,7 @@ def set_test_macros(self):
             )  # using debug register in this test isn't needed
 
     def set_user_project(self):
-        project = "caravel" if "CARAVEL_ROOT" in self.paths._fields else "cheetah" if  "CHEETAH_ROOT" in self.paths._fields else None
+        project = "caravel" if "CARAVEL_ROOT" in self.paths._fields else "cheetah" if "CHEETAH_ROOT" in self.paths._fields else None
         if self.sim == "RTL":
             user_include = f"{self.paths.USER_PROJECT_ROOT}/verilog/includes/includes.rtl.{project}_user_project"
         else: