Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

JIT: Optimize ConditionalSelect with const zero when condition is not TYP_MASK #113864

Merged
merged 7 commits into from
Apr 4, 2025
Merged

JIT: Optimize ConditionalSelect with const zero when condition is not TYP_MASK #113864

Changes from all commits
Commits
Show all changes
7 commits
Select commit Hold shift + click to select a range
5427caf
optimize ConditionalSelect with const zero
saucecontrol Mar 25, 2025
452fb12
Merge branch 'main' into csel
saucecontrol Mar 25, 2025
ee4fc69
Merge remote-tracking branch 'upstream/main' into csel
saucecontrol Mar 27, 2025
6dae598
remove superfluous LowerNode calls
saucecontrol Mar 27, 2025
a0abeb0
Revert "remove superfluous LowerNode calls"
saucecontrol Mar 28, 2025
17886e7
just remove one LowerNode call
saucecontrol Mar 28, 2025
08a5679
Revert "just remove one LowerNode call"
saucecontrol Mar 28, 2025
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
31 changes: 31 additions & 0 deletions src/coreclr/jit/lowerxarch.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -3414,6 +3414,37 @@ GenTree* Lowering::LowerHWIntrinsicCndSel(GenTreeHWIntrinsic* node)
blendVariableId = NI_EVEX_BlendVariableMask;
op1 = maskNode;
}
else if (op2->IsVectorZero() || op3->IsVectorZero())
{
// If either of the value operands is const zero, we can optimize down to AND or AND_NOT.
GenTree* binOp = nullptr;

if (op3->IsVectorZero())
Copy link
Member

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

can we have nodes of type ConvertMaskToVector(Vector.Zero) for op2 or op3. I just opened #114272 to fix a case where I was not checking that for arm64.

Copy link
Member Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

I don't see a way we'd create that currently on xarch, but I plan on reviving #110342 and will keep that possibility in mind since we'll more eagerly choose intrinsics that produce a mask with that.

{
binOp = comp->gtNewSimdBinOpNode(GT_AND, simdType, op1, op2, simdBaseJitType, simdSize);
BlockRange().Remove(op3);
}
else
{
binOp = comp->gtNewSimdBinOpNode(GT_AND_NOT, simdType, op3, op1, simdBaseJitType, simdSize);
BlockRange().Remove(op2);
}

BlockRange().InsertAfter(node, binOp);

LIR::Use use;
if (BlockRange().TryGetUse(node, &use))
{
use.ReplaceWith(binOp);
}
else
{
binOp->SetUnusedValue();
}

BlockRange().Remove(node);
return LowerNode(binOp);
}
else if (simdSize == 32)
{
// For Vector256 (simdSize == 32), BlendVariable for floats/doubles
Expand Down
Loading