KNOWNBUG tests for checkers

regression/verilog/checker/checker5.desc

@@ -0,0 +1,9 @@
+KNOWNBUG
+checker5.sv
+--bound 20
+^\[main\.c\.assert\.1\] always myChecker\.data != 10: REFUTED$
+^EXIT=10$
+^SIGNAL=0$
+--
+--
+Support for checkers inside modules is missing.

regression/verilog/checker/checker5.sv

@@ -0,0 +1,9 @@
+module main(input clk);
+  checker myChecker(input logic [31:0] data);
+    assert property (data != 10);
+  endchecker
+
+  reg [31:0] counter = 0;
+  always_ff @(posedge clk) counter++;
+  myChecker c(counter);
+endmodule

regression/verilog/checker/checker6.desc

@@ -0,0 +1,9 @@
+KNOWNBUG
+checker6.sv
+--bound 20
+^\[main\.c\.assert\.1\] always myChecker\.data != 10: REFUTED$
+^EXIT=10$
+^SIGNAL=0$
+--
+--
+Support for checkers inside packages is missing.

regression/verilog/checker/checker6.sv

@@ -0,0 +1,11 @@
+package my_package;
+  checker myChecker(input logic [31:0] data);
+    assert property (data != 10);
+  endchecker
+endpackage
+
+module main(input clk);
+  reg [31:0] counter = 0;
+  always_ff @(posedge clk) counter++;
+  my_package::myChecker c(counter);
+endmodule