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Merge pull request #412 from diffblue/verilog-array-types
Verilog: distinguish packed and unpacked arrays
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,8 @@ | ||
| KNOWNBUG | ||
| packed_real1.sv | ||
| --module main --bound 0 | ||
| ^EXIT=10$ | ||
| ^SIGNAL=0$ | ||
| -- | ||
| -- | ||
| A packed array of reals must be rejected. |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,9 @@ | ||
| module main; | ||
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| // Packed arrays can be made of single bit data types | ||
| // or other packed types. | ||
| typedef real my_real; | ||
| my_real [7:0] my_array; | ||
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| endmodule | ||
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,8 @@ | ||
| KNOWNBUG | ||
| packed_typedef1.sv | ||
| --module main --bound 0 | ||
| ^EXIT=0$ | ||
| ^SIGNAL=0$ | ||
| -- | ||
| -- | ||
| The packed array type must not be dropped. |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,8 @@ | ||
| module main; | ||
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| typedef bit my_bit; | ||
| my_bit [7:0] my_vector; | ||
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| always assert p0: ($bits(my_vector) == 8); | ||
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| endmodule |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
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@@ -28,80 +28,6 @@ Author: Daniel Kroening, [email protected] | |
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| /*******************************************************************\ | ||
| Function: verilog_typecheckt::array_type | ||
| Inputs: | ||
| Outputs: | ||
| Purpose: | ||
| \*******************************************************************/ | ||
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| array_typet verilog_typecheckt::array_type( | ||
| const irept &src, | ||
| const typet &element_type) | ||
| { | ||
| // int whatnot[x:y]; | ||
| // 'src' is yet to be converted, but 'element_type' is already converted. | ||
| PRECONDITION(src.id() == ID_array); | ||
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| // Unpacked arrays may have a range [x:y], | ||
| // or a size [s], equivalent to [0:s-1] | ||
| const exprt &range_expr = static_cast<const exprt &>(src.find(ID_range)); | ||
| const exprt &size_expr = static_cast<const exprt &>(src.find(ID_size)); | ||
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| mp_integer size, offset; | ||
| bool little_endian; | ||
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| if(range_expr.is_not_nil()) | ||
| { | ||
| // these may be negative | ||
| mp_integer msb, lsb; | ||
| convert_range(range_expr, msb, lsb); | ||
| little_endian = (lsb <= msb); | ||
| size = (little_endian ? msb - lsb : lsb - msb) + 1; | ||
| offset = little_endian ? lsb : msb; | ||
| } | ||
| else if(size_expr.is_not_nil()) | ||
| { | ||
| little_endian = true; | ||
| size = convert_integer_constant_expression(size_expr); | ||
| offset = 0; | ||
| if(size < 0) | ||
| { | ||
| throw errort().with_location(size_expr.find_source_location()) | ||
| << "array size must be nonnegative"; | ||
| } | ||
| } | ||
| else | ||
| { | ||
| throw errort() << "array must have range or size"; | ||
| } | ||
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| const typet src_subtype = | ||
| static_cast<const typet &>(src).has_subtype() | ||
| ? static_cast<const type_with_subtypet &>(src).subtype() | ||
| : typet(ID_nil); | ||
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| typet array_subtype; | ||
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| // may need to go recursive | ||
| if(src_subtype.is_nil()) | ||
| array_subtype=element_type; | ||
| else | ||
| array_subtype=array_type(src_subtype, element_type); | ||
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| const exprt final_size_expr = from_integer(size, integer_typet()); | ||
| array_typet result(array_subtype, final_size_expr); | ||
| result.set(ID_offset, from_integer(offset, integer_typet())); | ||
| result.set(ID_C_little_endian, little_endian); | ||
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| return result; | ||
| } | ||
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| /*******************************************************************\ | ||
| Function: verilog_typecheckt::typecheck_port_connection | ||
| Inputs: | ||
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