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Update to latest DAP version#107

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0xVector wants to merge 16 commits into
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Draft

Update to latest DAP version#107
0xVector wants to merge 16 commits into
d-iii-s:masterfrom
0xVector:master

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@0xVector 0xVector commented May 24, 2026

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Squashed and simplified history, further not squashed to preserve distinct changes to existing codebase / bugfixes.

Still Draft because I want to update the docs before merging

0xVector added 4 commits May 24, 2026 19:23
Fixes segfault on macOS when stdin is not a terminal (e.g. BATS test setup).

See 9c0d688 for similar bugfix in init.
Disable modernize-use-nullptr check (NULL -> nullptr) from C23
0xVector added 12 commits May 24, 2026 23:46
This is done to unify the initialization of the general CPU type in preparation for it containing the BP list (which will need to be initialized)
Make code BPs managed by the general_cpu_t and only delegate arch-specific operations to the concrete CPU.

Update both GDB and DAP debugging modes to use the new implementation.

BP list moved from concrete CPU structs for both unification and due to XLEN problem: breakpoint_check_for_code_breakpoints needs to access the CPU's list of BPs, but if they were directly inside the concrete cpu structure, not only would we have to break the abstraction and trigger them in an architecture-specific way, we would need to include both RV32 and RV64 cpu.h headers. These both define XLEN as 32/64, but it can't be included in one TU at once.
This allows to differentiate the general CPU based on its arch, used for debugging.

Alternative would be to use filters or names as in device.h, but this:
1) requires the whole device, not just CPU
2) is fragile as it is based on string names
3) would need a new filter as the existing doesn't differentiate between RV32 and RV64
This allows tracking steps independently in each CPU.

This is only really useful for DAP debugging now, but could be made available for per-device CLI debugging too.
Fixes 2 bound check bugs:

1) introduced in d8aaee0, the half open interval should be checked against access size, not BP size, as was previously done.

2) < instead of <= in half open interval check (allowed the excluded end before)
MIPS is inconsistent with RV CPUs, not triggering physmem BPs on instruction fetch
Fixes a bug triggered in rv64_interrupt_up: the RV_INTERRUPT_NO macro expansion applied operator ~ to RV_INTERRUPT_EXC_BITS which expanded to 1UL << 63UL instead of (1UL << 63). This caused it to evaluate to 0 instead of all except MSb set, making the interrupt number default to MEI instead.
- use 3 args
- add Step request
- add GetConfig request
- add register (general+csr) read/write request
- add CPU info request
- make step/stopped at track the relevant CPU
- rename stop request to terminate request
- refactor
@0xVector 0xVector changed the title Merge latest DAP version Update to latest DAP version May 25, 2026
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