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4f2e920
First version of code to combine TBs from 8 -> 2
Dec 7, 2024
2fb19d6
Fix typo
Dec 7, 2024
6788111
Fixes to MP to produce new combined FM
Dec 7, 2024
1682b5c
Add new bodge files for the combined TBs
Dec 7, 2024
966432f
Restore testing 100 events
Dec 7, 2024
29a0f6c
Remove the 'bodge' files as no longer needed
Dec 8, 2024
61e955e
Changes for building project with new combined TB
Dec 8, 2024
b9db7ce
Updated floorplan for new TrackBuilders
Dec 8, 2024
e66d151
Correction to script_TB.tcl file
Dec 9, 2024
b3ccddc
Some cleanup of the write_mem methods
Dec 10, 2024
ddd88bf
Fix TrackMerger so that it runs. Still need more TLC
Dec 10, 2024
d9748d2
Restore TP barrel and disk masks
Dec 10, 2024
72f0091
Some further code cleanup
Dec 10, 2024
32c5cb9
Adding missing #include and add hack to work around vivado hard crash
Dec 11, 2024
d9fd5c2
Fixes so that we reach II=1 on test benches - this involved some hack…
Dec 12, 2024
509577d
First steps towards supporting multiple MPs
Dec 14, 2024
d558427
Minor logic fix in string parsing
Dec 14, 2024
bbf51d4
Generalize the TrackBuilder so that it can handle the duplicate MPs
Dec 15, 2024
3b63fdc
Correct mistake in scrpt_MP.tcl
Dec 15, 2024
a1a2f81
Add missing return for integration builds
Dec 15, 2024
7622107
Updates to allow the integrated FPGA2 project to build
Dec 18, 2024
fb8dc55
Cleanup printout when running download.sh
Dec 18, 2024
3aa8e71
Correct typo
Dec 18, 2024
2b66bf0
Fix missing pragma for building integrated project
Dec 19, 2024
9cdc7ab
Updated to fix problem with integrated project
Dec 19, 2024
54688a1
Update to use new test vectors from 14_2_0_pre4
Jan 10, 2025
d3083d4
First version of a reduced split FPGA2 project
Jan 28, 2025
02323a1
Changes so that each trackword has all layers
Jan 28, 2025
e74bdf1
Removing obsolete files
Jan 28, 2025
141f6b1
Updates for new bin mask interface in VMStub memories
Feb 10, 2025
c44d731
Updates to VMStub memory implementation
Feb 10, 2025
1e6deb2
Fix issue with II=2 for test benches with new binned memory
Feb 11, 2025
0dfc11e
Fix CI script and adjust MemoryTemplateBinnedCM.h
Feb 12, 2025
67bd12d
Remove some umused code
Feb 12, 2025
7d48ea9
Fix review comments to remove some hardcoded values
Feb 12, 2025
0f02e2d
Attempt to fix error in CI script
Feb 12, 2025
738573f
Add comments
Feb 12, 2025
1717edd
Add missing start_bx.wcfg file
Feb 12, 2025
4d2f4df
Add some debug printout
Feb 17, 2025
01a13e2
Multiple smaller fixes to address emulations vs HLS/vhdl differences …
Feb 25, 2025
cbcb089
Updates in WriteVHDLSyntax to write correct memory page size for the …
Feb 25, 2025
a4f1a7d
Restore script_IR.tcl to not run the negative modules
Feb 25, 2025
1f40880
Fix writing of tpar so TF memory properly filled
Feb 26, 2025
faa086e
Fix (kind of a hack) in the CompareMemPrintsFW.py to handle the overw…
Feb 26, 2025
b6cbf40
Various fixes for BX alignment to get agreement for reduced project w…
Mar 2, 2025
07c9a21
Various fixes for BX alignment to get agreement for reduced project w…
Mar 2, 2025
abda542
Fix PR comments from A. Hart
Mar 2, 2025
f0c70eb
Fix intitialization logic
Mar 2, 2025
37f5241
Updates to 100 event reduced configuration
Mar 8, 2025
15e8536
Fix to use the hit mask for the mpar memory
Mar 8, 2025
b06e15d
Correct calculation of number of stub words for writing TB memories
Mar 9, 2025
2385b4c
Fixes for writing debug files
Mar 10, 2025
5463289
Fixes to writing of debug files
Mar 10, 2025
a6cd09a
Handle overflow in VMSME memories in the comparison scripts
Mar 10, 2025
de9768b
Further fixes to get full agreement on 100 ttbar events. Fix latency …
Mar 12, 2025
db9010e
Address comments on PR 356
Mar 27, 2025
02af7b0
Commit the 53fc560 commit of project_generation_script
Mar 30, 2025
eabdf9c
Fix changed obsolete constant name
Mar 30, 2025
f56cbdd
Fixes to TrackMerger after eliminating variable
Mar 30, 2025
95883ed
Pylint fixes from @aryd (#360)
aehart Apr 8, 2025
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12 changes: 6 additions & 6 deletions .gitlab-ci.yml
Original file line number Diff line number Diff line change
Expand Up @@ -136,12 +136,12 @@ IR-quality-check:
<<: *template_quality-check
variables:
VIVADO_VERSION: "2019.2"
CLANG_TIDY_FILES: '../TestBenches/InputRouter_test.cpp ../TopFunctions/CombinedConfig/InputRouterTop.cc'
CLANG_TIDY_FILES: '../TestBenches/InputRouter_test.cpp ../TopFunctions/CombinedConfig_FPGA2/InputRouterTop.cc'
VMRCM-quality-check:
<<: *template_quality-check
variables:
VIVADO_VERSION: "2019.2"
CLANG_TIDY_FILES: '../TestBenches/VMRouterCM_test.cpp ../TopFunctions/CombinedConfig/VMRouterCMTop_L2PHIA.cc'
CLANG_TIDY_FILES: '../TestBenches/VMRouterCM_test.cpp ../TopFunctions/CombinedConfig_FPGA2/VMRouterCMTop_L2PHIA.cc'
VMSMER-quality-check:
<<: *template_quality-check
variables:
Expand All @@ -151,7 +151,7 @@ TP-quality-check:
<<: *template_quality-check
variables:
VIVADO_VERSION: "2019.2"
CLANG_TIDY_FILES: '../TestBenches/TrackletProcessor_test.cpp ../TopFunctions/CombinedConfig/TrackletProcessorTop.cc'
CLANG_TIDY_FILES: '../TestBenches/TrackletProcessor_test.cpp ../TopFunctions/CombinedConfig_FPGA2/TrackletProcessorTop.cc'
PC-quality-check:
<<: *template_quality-check
variables:
Expand Down Expand Up @@ -236,7 +236,7 @@ topReducedCombined-sim:
allow_failure: true
variables:
VIVADO_VERSION: "2019.2"
PROJ_NAME: "ReducedCombinedConfig"
PROJ_NAME: "ReducedCombinedConfig_FPGA2"
needs:
- job: download
- job: IR-vivado-hls-build
Expand All @@ -259,7 +259,7 @@ topReducedCombined-check-results:
allow_failure: true # FIXME: remove after all errors are fixed
variables:
VIVADO_VERSION: "2019.2" # Vivado not needed but it is part of the path that is called
PROJ_NAME: "ReducedCombinedConfig"
PROJ_NAME: "ReducedCombinedConfig_FPGA2"
needs:
- download
- topReducedCombined-sim
Expand All @@ -269,7 +269,7 @@ topReducedCombined-synth:
allow_failure: true
variables:
VIVADO_VERSION: "2019.2"
PROJ_NAME: "ReducedCombinedConfig"
PROJ_NAME: "ReducedCombinedConfig_FPGA2"
needs:
- job: download
- job: topReducedCombined-sim
Expand Down
53 changes: 0 additions & 53 deletions IntegrationTests/CombinedBarrelConfig/IRtoKF/firmware/Makefile

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185 changes: 0 additions & 185 deletions IntegrationTests/CombinedBarrelConfig/IRtoKF/firmware/hdl/emp_cdc.vhd

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